UART3 - not able to receive data

I have enabled UART3 (/dev/ttyTHS3) with below change

@@ -55,7 +55,7 @@
                        gpios = <TEGRA_MAIN_GPIO(R, 4) 0>;
                        label = "wifi-over-pcie";
-                       status = "disabled";
+                       status = "okay";

I am able to transmit data from the target but not able to receive data sent by host.
This is on a custom hardware, I can see the Rx line toggling when data is being sent to TX2 but it is not able to read it. Also the IRQ count doesn’t increase at this time. During write I can see the IRQ count increasing.

I tried to change the status from ‘disabled’ to ‘okay’ in “uartd: serial@3130000” but it didn’t help.

Are there any other device tree changes required?

L4T Release: R28.1

Are you using flow control? I’ve found some of the ports don’t like CTS/DTS flow control (at least not in both directions).

No I am not using flow control.

How are these different from console UART?

With console UART (ttyS0) we are able to get debug logs and also enter commands (both Tx and Rx are working) but not with ttyTHS3.

I don’t see anything obvious also in the device tree, any suggestions on how to debug this further?

I have not used this particular port, but the first thing which comes to mind is a conflict with competing hardware.

On a stock R28.2 pre-release I see this in dmesg:

[    2.636693] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 40, base_baud = 0) is a TEGRA_UART

So you know you are hunting for anything related to base address 0x0x3130000. Grep for this in dmesg adds:

[    0.241929] iommu: Adding device 3130000.serial to group 17
[    2.635856] serial-tegra 3130000.serial: RX in PIO mode

Of all of the UARTs this is the only UART with the PIO mode note. Since this is specific to the RX side it would make sense that this is interfering with host-to-Jetson on ttyTHS3.

Would anyone here happen to know what device tree options on ttyTHS3 (0x3130000) might be related to this mode and for what purpose this is PIO (perhaps it is just the default)?

Thanks linuxdev.

I am able to transmit and receive from UART3 now.
I see similar logs but our problem is something else. We have a transceiver in between and one of the control signal is not set correctly.
Thank you for your time.

serial@3130000 {
	compatible = "nvidia,tegra186-hsuart";
	#stream-id-cells = <0x1>;
	reg = <0x0 0x3130000 0x0 0x40>;
	reg-shift = <0x2>;
	interrupts = <0x0 0x73 0x4>;
	nvidia,memory-clients = <0xe>;
	dmas = <0x19 0x13 0x19 0x13>;
	dma-names = "tx";
	clocks = <0xd 0x4d 0xd 0x10d>;
	clock-names = "serial", "parent";
	resets = <0xd 0x32>;
	reset-names = "serial";
	status = "okay";
	nvidia,adjust-baud-rates = <0x1c200 0x1c200 0x64>;
	linux,phandle = <0x83>;
	phandle = <0x83>;

[ 2.719226] serial-tegra 3130000.serial: RX in PIO mode
[ 2.720120] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 40, base_baud = 0) is a TEGRA_UART

I have the same problem. the UART3 can’t work. but other UARTs can work.

How do you resolve the problem? @Arun_work

Our custom board connected uart3 to RS232 chipset. I do this change in dts.But UART3(ttyTHS3) tx does not work.

gpios = <TEGRA_MAIN_GPIO(R, 4) 0>;
                        label = "wifi-over-pcie";
-                       status = "disabled";
+                       status = "okay";

How did you fix this problem?

You will probably want to create a new thread since the current thread is for UARTs. When you create the new thread be sure to indicate which release is flashed, and the method by which you installed the new device tree. Also, confirm if the change can be seen in “/proc/device-tree/” (this is a reflection of the device tree which mirrors the dts source file).