Uart0 hardware corresponding node on TX2

Dear,

I want to use UART0 to GPS on TX2(R32.5.1).Don’t know the corresponding node,i try ttyTHS1,ttyTHS2, ttyTHS3,ttyUSB0~ttyUSB3,ttyS0,but no data.

hello shaorui,

please access Jetson TX2 Series OEM Product Design Guide and check [Figure 46. UART Connections] for the hardware connections.
you may looking for kernel logs, $ dmesg | grep THS for all registered nodes,
please check software register node for… uarta: serial@3100000.
thanks

dmesg | grep THS
[ 0.950287] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 33, base_baud = 0) is a TEGRA_UART
[ 0.951356] c280000.serial: ttyTHS2 at MMIO 0xc280000 (irq = 34, base_baud = 0) is a TEGRA_UART
[ 0.952397] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 35, base_baud = 0) is a TEGRA_UART

I cannot find serial@3100000

hello shaorui,

uarta is the default debug port, this should be configured and initialized correctly.
please review product design guide and check your hardware connections, since there’re 5 UARTs, how about using uartg?

dmesg | grep tty
[    0.000000] Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 isolcpus=1-2  video=tegrafb no_console_suspend=1 earlycon=uart8250,mmio32,0x3100000 nvdumper_reserved=0x1772e0000 gpt rootfs.slot_suffix= tegra_fbmem=0x800000@0x96081000 lut_mem=0x2008@0x9607e000 usbcore.old_scheme_first=1 tegraid=18.1.2.0.0 maxcpus=6 boot.slot_suffix= boot.ratchetvalues=0.2031647.1 vpr_resize bl_prof_dataptr=0x10000@0x175840000 sdhci_tegra.en_boot_part_access=1 quiet root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 isolcpus=1-2
[    0.000946] console [tty0] enabled
[    0.929418] console [ttyS0] disabled
[    0.929456] 3100000.serial: ttyS0 at MMIO 0x3100000 (irq = 32, base_baud = 25500000) is a Tegra
[    0.948827] console [ttyS0] enabled
[    0.950287] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 33, base_baud = 0) is a TEGRA_UART
[    0.951356] c280000.serial: ttyTHS2 at MMIO 0xc280000 (irq = 34, base_baud = 0) is a TEGRA_UART
[    0.952397] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 35, base_baud = 0) is a TEGRA_UART
[    7.550318] usb 1-3: GSM modem (1-port) converter now attached to ttyUSB0
[    7.553818] usb 1-3: GSM modem (1-port) converter now attached to ttyUSB1
[    7.554226] usb 1-3: GSM modem (1-port) converter now attached to ttyUSB2
[    7.554529] usb 1-3: GSM modem (1-port) converter now attached to ttyUSB3

uart is ttyS0 ?

base_baud = 25500000 is baud?

ttyS0 rev no data.

hello shaorui,

that’s uarta for the default debug port, you’ll need modifications to treat it as normal serial port.
may I know is it possible to have other pins for your serial port communication.
btw, the default baudrate settings is 115200/8n1, thanks

 48     serial@3100000 {
 49         compatible = "nvidia,tegra20-uart", "nvidia,tegra186-hsuart";
 50         console-port;
 51         sqa-automation-port;
 52         /delete-property/ resets;
 53         /delete-property/ reset-names;
 54         status = "okay";
 55     };
 56
 57     serial@3110000 {
 58         compatible = "nvidia,tegra186-hsuart";
 59         status = "okay";
 60     };
 61
 62     serial@c280000 {
 63         compatible = "nvidia,tegra186-hsuart";
 64         status = "okay";
 65         //status = "disabled";
 66     };

i need modifications to serial@3100000.For example:
serial@3100000 {
compatible = “nvidia,tegra186-hsuart”;
status = “okay”;
};

hello shaorui,

you should also have modification to configure debug port from UART0 to UART1
for example,

  1. BCT changes, file name: tegra186-mb1-bct-misc-si-l4t.cfg
****************************
cpu.nafll_b_cluster_data = 0x11F04461;
##### debug variables #####
debug.enable_log = 1;
-debug.uart_instance = 0;
+debug.uart_instance = 2;
##### sw_carveout variables #####
****************************
  1. device tree changes to get kernel logs,
serial@3100000 {
- compatible = "nvidia,tegra20-uart", "nvidia,tegra186-hsuart";
+ compatible = "nvidia,tegra186-hsuart";
console-port;
sqa-automation-port;
status = "okay";
@@ -53,7 +53,7 @@
};
 
serial@c280000 {
- compatible = "nvidia,tegra186-hsuart";
+ compatible = "nvidia,tegra20-uart", "nvidia,tegra186-hsuart";
status = "okay";
};
  1. please add ttyS2 into kernel-command line,
-CMDLINE_ADD="console=ttyS0,115200n8 console=tty1 OS=l4t fbcon=map:0 net.ifnames=0";
+CMDLINE_ADD="console=ttyS2,115200n8 console=tty1 OS=l4t fbcon=map:0 net.ifnames=0";

I need uart0 and uart1, uart0 is 485 dev,uart1 is GPS.

serial@3100000 {
- compatible = "nvidia,tegra20-uart", "nvidia,tegra186-hsuart";
+ compatible = "nvidia,tegra186-hsuart";
console-port;
sqa-automation-port;
status = "okay";
@@ -53,7 +53,7 @@
};
 
serial@c280000 {
 compatible = "nvidia,tegra186-hsuart";
 status = "okay";
};

as I mentioned, that’s uarta for the default debug port, you’ll need to disable that or the logs will populate to uart0.

debug port is ttyTCU0(kernel uart) ?

it’s ttyS0, it’s also contain bootloader logs.

1 Like

ttyS0(uarta for the default debug port) donot modifications normal serial port,Can’t receive 485-data. how to receive 485
data

If uart0 and uart1 all use,Is there any good way.

hello shaorui,

since there’re 5 UARTs available, please review your hardware connections and also check product design guide for reference, thanks

TX2 design guide for reference uart0 is Transmit,and uart0 and uart1 all use on TX2?
Replenish:NANO and Xavier_NX uart0 and uart1 all use.

please check [Table 75. UART Interface Mapping] for the typical usage, thanks

Table 75. UART Interface Mapping is HDMI,Is it the picture below?