General UART on Jetson TX2-NX (pin #203 - TxD and pin #205 - RxD)

Dear Community,

I have a carrier board that works with Xavier NX and the general UART is mapped to /dev/ttyTHS0 and working well :

nvidia@XNX:~$ dmesg | grep tty
[    0.000000] Kernel command line: console=ttyTCU0,115200 video=tegrafb no_console_suspend=1 earlycon=tegra_comb_uart,mmio32,0x0c168000 gpt rootfs.slot_suffix= tegra_fbmem=0x800000@0xa06a0000 lut_mem=0x2008@0xa069a000 usbcore.old_scheme_first=1 tegraid=19.1.2.0.0 maxcpus=6 boot.slot_suffix=_b boot.ratchetvalues=0.4.2 vpr_resize sdhci_tegra.en_boot_part_access=1    quiet root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyTCU0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0
[    0.000622] console [tty0] enabled
[    1.563865] 3100000.serial: ttyTHS0 at MMIO 0x3100000 (irq = 47, base_baud = 0) is a TEGRA_UART
[    1.565110] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 48, base_baud = 0) is a TEGRA_UART
[    1.565910] 3140000.serial: ttyTHS4 at MMIO 0x3140000 (irq = 49, base_baud = 0) is a TEGRA_UART
[    1.567431] console [ttyTCU0] enabled

I replace the Xavier NX by the TX2 NX, the physical UART port is the same. And below is the boot message :

nvidia@TX2NX:~$ dmesg | grep tty
[    0.000000] Kernel command line: console=ttyS0,115200 root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 isolcpus=1-2  video=tegrafb no_console_suspend=1 earlycon=uart8250,mmio32,0x3100000 nvdumper_reserved=0x1772e0000 gpt rootfs.slot_suffix= tegra_fbmem=0x800000@0x96081000 lut_mem=0x2008@0x9607e000 usbcore.old_scheme_first=1 tegraid=18.1.2.0.0 maxcpus=6 boot.slot_suffix= boot.ratchetvalues=0.2031647.1 vpr_resize bl_prof_dataptr=0x10000@0x175840000 sdhci_tegra.en_boot_part_access=1 quiet root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyS0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0 isolcpus=1-2 
[    0.000817] console [tty0] enabled
[    0.861713] console [ttyS0] disabled
[    0.861759] 3100000.serial: ttyS0 at MMIO 0x3100000 (irq = 32, base_baud = 25500000) is a Tegra
[    0.881128] console [ttyS0] enabled
[    0.883012] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 33, base_baud = 0) is a TEGRA_UART
[    0.883916] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 34, base_baud = 0) is a TEGRA_UART

But neither ttyTHS1 nor ttyTHS3 works. It seems that it is not enabled by default on TX2 NX, Therefore, I would like to know how to enable that General UART port and what ttyTHSx that it should be mapped to, please ?

The UART pin #203 and pin #205 of Xavier NX and TX2 NX are described in their Product Guide respectively :

Xavier NX

TX2 NX

I am using Jetpack 4.5.1.

Thanks and best regards,
Khang.

Hi again,

I found the configuration of UART ports in both platforms as following :

For Xavier NX :
In kerneltree/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3668-common.dtsi :

        serial@3100000 {
                compatible = "nvidia,tegra186-hsuart";
                status = "okay";
        };

        serial@3140000 {
                compatible = "nvidia,tegra186-hsuart";
                status = "okay";
        };

        combined-uart {
                console-port;
                combined-uart;
                status = "okay";
        };

And in kerneltree/hardware/nvidia/platform/t19x/jakku/kernel-dts/common/tegra194-p3509-0000-a00.dtsi :

        serial@3110000 {
                status = "okay";
        };

For TX2 NX :
In kerneltree/hardware/nvidia/platform/t18x/lanai/kernel-dts/common/tegra186-p3636-0001-common.dtsi :

        serial@3100000 {
                compatible = "nvidia,tegra20-uart", "nvidia,tegra186-hsuart";
                console-port;
                sqa-automation-port;
                /delete-property/ resets;
                /delete-property/ reset-names;
                status = "okay";
        };

        serial@3110000 {
                compatible = "nvidia,tegra186-hsuart";
                status = "okay";
        };

        serial@c280000 {
                status = "disabled";
        };

        serial@3130000 {
                compatible = "nvidia,tegra186-hsuart";
                dma-names = "tx";
                status = "okay";
        };

In order to have same UART configuration for both modules on same carrier board, should I reconfigure the console-port of TX2 NX to combined-uart node as in the case of Xavier NX instead of serial@3100000 node, please ?

Best Regards,
K.

Dear @JerryChang ,

It seems that I found the solution for my issue in the following thread : TX2 NX RS232 Communication Problem - #14 by JerryChang

However, In the 3 steps you described, I wonder how to obtain the /Linux_for_Tegra/bootloader/t186ref/tegra186-bpmp-p3636-0001-a00-00.dtb again after disassembling it to remove the configuration related to the uartc (or serial@c280000 or ttyTHS2), please?

Thanks in advance and best regards,
K.

hello khang.l4es,

sorry for reply late,
you may use the dtc utility to disassembler the dtb file into text file, and convert that into a new device tree blob.
for example,
to disassembler the dtb file into text file, temp.dts. $ dtc -I dtb -O dts -o temp.dts tegra210.dtb
after some modification, you could convert the DTS to a new DTB, output.dtb. $ dtc -I dts -O dtb -o output.dtb temp.dts

Hi @JerryChang ,

Thanks very much!

BR,
K.

Hi @JerryChang ,
I also have another question :

Also from TX2 NX RS232 Communication Problem - #14 by JerryChang, you said :

Enable THS2 with /Linux_for_Tegra/bootloader/tegra186-p3636-0001-p3509-0000-a01.dtb

However I can only find /Linux_for_Tegra/kernel/dtb/tegra186-p3636-0001-p3509-0000-a01.dtb

Is mine correct or the required file is missing?

Best regards,
K.

hello khang.l4es,

please use $OUT/Linux_for_Tegra/kernel/dtb/tegra186-p3636-0001-p3509-0000-a01.dtb for updating device tree settings.
I’ve also revise my comments, thanks for checking.

Thanks @JerryChang for the update. I was hesitating while the others confirmed that it was present and worked.
By the way, it seems that $OUT/Linux_for_Tegra/kernel/dtb/tegra186-p3636-0001-p3509-0000-a01.dtb is compiled from public_sources/Linux_for_Tegra/source/public/kernel_src/hardware/nvidia/platform/t18x/lanai/kernel-dts/tegra186-p3636-0001-p3509-0000-a01.dts so there’s no need to disassembler the .dtb file for any modification, right?

Best Regards,
K

hello khang.l4es,

both of these two approaches are accepted.
it’s a convenient way to disassembler the original device tree blob from binary file to modify the settings, and convert it as new device tree blob to apply the settings;
or, you may include all the changes and build another new device tree from public release sources.

1 Like

Thanks @JerryChang ,

I would like just to make sure that both above dts and dtb are relevant each other.

Best Regards,
K.

hello khang.l4es,

in general, this file $OUT/Linux_for_Tegra/kernel/dtb/tegra186-p3636-0001-p3509-0000-a01.dtb is the dtb binary used by TX2 NX.
as you can see in the public release sources, i.e. .../hardware/nvidia/platform/t18x/lanai/kernel-dts/tegra186-p3636-0001-p3509-0000-a01.dts. there’re several device tree sources (*.dtsi) has included, the later included device tree property is able to change the previous settings, and all of them included together to build the finalize dtb binary file.

Hi @JerryChang,

Thanks for your thorough explanation. I usually include my custom .dtsi into .../hardware/nvidia/platform/t18x/lanai/kernel-dts/tegra186-p3636-0001-p3509-0000-a01.dts during the driver development.

I will apply the modification that you shared in TX2 NX RS232 Communication Problem - #14 by JerryChang and if it works, I will put this ticket in Resolved. Otherwise, I might have further questions.

Thanks,
K.

Hi @JerryChang ,
It seems that I already reached step to disable BPMP logs (and enable THS2) described in TX2 NX RS232 Communication Problem - #19 by yenchao

nvidia@TX2NX:~$ dmesg | grep ttyTHS
[    0.992508] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 33, base_baud = 0) is a TEGRA_UART
[    0.993437] c280000.serial: ttyTHS2 at MMIO 0xc280000 (irq = 34, base_baud = 0) is a TEGRA_UART
[    0.994468] 3130000.serial: ttyTHS3 at MMIO 0x3130000 (irq = 35, base_baud = 0) is a TEGRA_UART

But communication seems not to be done over Cutecom (/dev/tyyS0, /dev/ttyTHS1, /dev/ttyTHS3, /dev/ttyTHS2) when looping back Tx and Rx .

Is there anything else that I was missing ?
Best regards,
K.

hello khang.l4es,

may I know what’s your actual use-case,
are you going to setup serial console via 40-pin expansion header to check boot logs?
could you please describe the status. thanks

Hi @JerryChang ,

I shorted the Tx and Rx signals on my own carrier board together and used cutecom to send data over Tx in expecting receiving the same from Rx.

Best Regards,
K.

hello khang.l4es,

it’s something like loopback of Tx and Rx, right? may I know what’s the baudrate settings in cutecom?
note, if you’re connect to serial console, sending a character might interrupt bootloader, and put you into console mode.

H i@JerryChang,
Below are the settings of Cutecom for ttyTHS2 :

if you’re connect to serial console, sending a character might interrupt bootloader, and put you into console mode.

I did the test of ttyTHS2 with Cutecom within Ubuntu, so I don’t think that I interrupted the bootloader.

Best Regares,
Khang

Hi @JerryChang,
To update, effectively it works. I did the loopback with wrong Tx and Rx signals.

Thank you!
Khang

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