M.2 Uart (UART0) issues on XavierNX (custom carrier board)

Hello,

I am facing some issues regarding the TX pin on the M.2 Uart. I am using a custom carrier board with level shifted signals on the ttyTHS1. This port works fine on the TX2 NX. I had no succress while using the Xavier NX. I am able to receive data, but i can’t send anything. (I’ve connected ttyTHS1 and ttyTHS0 to test this).

I am currently using the stock image provided by Nvidia without my changes to the devicetree.

Source file: /hardware/nvidia/soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-uart.dtsi (l4t 32.6.1)

        // ttyTHS0
	uarta: serial@3100000 {
		compatible = "nvidia,tegra186-hsuart";
		iommus = <&smmu TEGRA_SID_GPCDMA_0>;
		dma-coherent;
		reg = <0x0 0x03100000 0x0 0x10000>;
		reg-shift = <2>;
		interrupts = <0 TEGRA194_IRQ_UARTA 0x04>;
		nvidia,memory-clients = <14>;
		dmas = <&gpcdma 8>, <&gpcdma 8>;
		dma-names = "rx", "tx";
		clocks = <&bpmp_clks TEGRA194_CLK_UARTA>,
			<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
		clock-names = "serial", "parent";
		resets = <&bpmp_resets TEGRA194_RESET_UARTA>;
		reset-names = "serial";
		status = "disabled";
	};

        // ttyTHS1
	uartb: serial@3110000 {
		compatible = "nvidia,tegra186-hsuart";
		iommus = <&smmu TEGRA_SID_GPCDMA_0>;
		dma-coherent;
		reg = <0x0 0x03110000 0x0 0x10000>;
		reg-shift = <2>;
		interrupts = <0 TEGRA194_IRQ_UARTB 0x04>;
		nvidia,memory-clients = <14>;
		dmas = <&gpcdma 9>, <&gpcdma 9>;
		dma-names = "rx", "tx";
		clocks = <&bpmp_clks TEGRA194_CLK_UARTB>,
			<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>;
		clock-names = "serial", "parent";
		resets = <&bpmp_resets TEGRA194_RESET_UARTB>;
		reset-names = "serial";
		status = "disabled";
	};

TX2 NX:

Xavier NX:

Its the same hardware.

Additional information about the UART on Xavier NX:
Pins: 99 (GPIO3_PX.04, UART0_TXD) and 101 (GPIO3_PX.05, UART0_RXD)
DTB serial: serial@3110000

hello Tobias_sch,

may I know… had you refer to [Jetson Xavier NX Product Design Guide] for the UART connections,
since it’s a customer carrier board, do you complete the pinmux customization to update the cfg file?

Hello JerryChang,

Thanks for your reply. I was not in the office for the last 2 Weeks, so I couldn’t answer right away. I’ve checked the proper config file and couldn’t find any issues with that one.

The DTB above is unchanged compared to the one provided by Nvidia (L4T 32.6.1). So i assumed that the pinmux cfg should also stay the same way for the UART pin.

I found another carrier board with this interface populated without levelshifters (1.8v) and I am facing the same issue on that one. I currently don’t have a DevKit available to evaluate this on there.

Hey,

I still could’t resolve this issue. I would appreciate any help that i can get on this topic, if someone else got this interface to work.

Hi @Tobias_sch ,
I would say that there might be issue with the setup of minicom. You can install cutecom and run sudo cutecom to test with the loopback (Tx shorted to Rx). For example, following is the configuration of THS2 (without any HW handshaking) :
image

By default both following uarts work without any modification in dtsi/dts :

[    1.563865] 3100000.serial: ttyTHS0 at MMIO 0x3100000 (irq = 47, base_baud = 0) is a TEGRA_UART
[    1.565110] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 48, base_baud = 0) is a TEGRA_UART

Note that the Tx and Rx of ttyTHS0 (3100000) is mapped to pin 203/205 of the Xavier NX SOM, Tx and Rx of ttyTHS1 (3110000) is mapped to pin 99/101.

Regards,
K

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Hi,

Thank you for your fast reply. That helped me a lot, there are indeed the wrong settings on the TTY. It works now, here are the two different settings in case someone needs this in the future:
Correct settings (done by Cutecom):
cutecom_settings
Wrong settings (done by Minicom):
minicon_settings

Best Regards

1 Like

So apparently its enough for Minicom to disable Hardware Flow Control to get the UART working.

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