Debug UART in jetson xavier NX is not working

Hi,

I am trying to read the debug data on serial console on Xavier NX and connected a serial to USB cable to pins 238 UART2_RXD and 236 UART2_TXD on our custom carrier board and I do not receive any data at 115200 Baud rate.

I am using stock BSP 32.5.1
Same carrier board same cable and setup, if I connect Nano module, I can see the debug console data. Our carrier card works for both Nano and XNX

I have tried changing TTL cable also, checked some forum suggestions before coming here. I am using this pins.

can you suggest me on this?

Greetings vbhm,

I have an Xavier NX Dev Kit and am trying to use the RXD and TXD on the J14 block.
I too am having problems.
I seem to get data but it’s all unreadable. I’m using 115200,8,N,1 for port settings.

I didn’t change out the cable but can use the same cable to connect to another device so I know it’s functioning properly.

Hopefully, someone can help us out.

Update: tried with my Nano but I get the same unreadable characters.

hello vbhm,

please access Jetson Xavier NX Product Design Guide, and check [Figure 12-5. Jetson Xavier NX UART Connections].
it’s default using pin-203/205 route to the J12, 40-pin expansion header for the UART communications.
[edit]: it’s by default using J14.

if you’re using pin-236/238 for using Debug UART,
you may also modify the spe_uart_instance in the tegra194-mb1-bct-misc-l4t.cfg to change the UART controller.
thanks

Hi,

Yes we are using pin-236/238 for debug UART, what change I need to make for spe_uart_instance ?

It is as below by default for me:
enable_sce = 0;
enable_rce = 1;
enable_ape = 1;
enable_combined_uart = 1;
spe_uart_instance = 0x2;

ucode rollback version

rollback.min_ratchet.tsec = 3;

And this is the only change I need to do for Debug UART to be enabled?

hello vbhm,

it should be… pin-236/238 = UART3_TX/RX = uartc = ttyTHS2
please output the logs to /dev/ttyTHS2, and use oscilloscope to monitor UART3_TX/RX signals.
thanks

Apologies, I am not clear with this

I get this if I grep:
nvidia@nvidia-desktop:~$ dmesg | grep tty
[ 0.000000] Kernel command line: console=ttyTCU0,115200 video=tegrafb no_console_suspend=1 earlycon=tegra_comb_uart,mmio32,0x0c168000 gpt tegra_fbmem=0x800000@0xa069c000 lut_mem=0x2008@0xa0696000 usbcore.old_scheme_first=1 tegraid=19.1.2.0.0 maxcpus=6 boot.slot_suffix= boot.ratchetvalues=0.4.2 vpr_resize sdhci_tegra.en_boot_part_access=1 quiet root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyTCU0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0
[ 0.000563] console [tty0] enabled
[ 1.642067] 3100000.serial: ttyTHS0 at MMIO 0x3100000 (irq = 47, base_baud = 0) is a TEGRA_UART
[ 1.643147] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 48, base_baud = 0) is a TEGRA_UART
[ 1.643889] 3140000.serial: ttyTHS4 at MMIO 0x3140000 (irq = 49, base_baud = 0) is a TEGRA_UART
[ 1.645214] console [ttyTCU0] enabled
nvidia@nvidia-desktop:~$

with default Stock BSP without any change, you mean to say if I monitor UART at pins 203/205 I should get debug logs right? But I am not getting any data if I monitor these UART pins

that’s correct.
you shall see output logs by default through pin-8/10 on J12.

Yes, tried this but not getting any output logs

for pins 236/238 can you brief me what needs to be changed to make it debug console?

hello vbhm,

I need to revise my previous comments,
by default, we’re able to use J14, TX/RX/GND pins to output uart logs on Xavier NX DevKits.
thanks

Hi,

I have checked on J14 TX/RX/GND and able to see boot logs- these are pin 238/236 on NX SOM.

Can you please help me how to change this to 203 and 205 where all I need to change in BSP?
(UART1_TXD/UART1_RXD) ? are these pins corresponds to ttyTHS1?

also can we put our emmc nx module inot devkit?

  1. these same 238/236 pins are used as debug UART in our carrier board and if I connect i am getting junk characters (115200BR)

  2. but if I connect on 203 and 205 pins I get login console only in devkit/our carrier board with Nvidia Stock BSP, not the boot logs

hello vbhm,

please check below on your Xavier NX,
it should be several serial ports available.
for example,

$ dmesg | grep THS
[    1.502202] 3100000.serial: ttyTHS0 at MMIO 0x3100000 (irq = 47, base_baud = 0) is a TEGRA_UART
[    1.503855] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 48, base_baud = 0) is a TEGRA_UART
[    1.504543] 3140000.serial: ttyTHS4 at MMIO 0x3140000 (irq = 49, base_baud = 0) is a TEGRA_UART

if you check into the device tree sources, they’re mapping to different uart ports.
please also refer to product design guide to see the pin signaling for reference.
for example,
$L4T_Sources/r32.6.1/Linux_for_Tegra/source/public/hardware/nvidia/soc/t19x/kernel-dts/tegra194-soc/tegra194-soc-uart.dtsi

        uarta: serial@3100000 {...}
        uartb: serial@3110000 {...}
        uarte: serial@3140000 {...}

Hi,

I could see below ,

[ 0.000000] Kernel command line: console=ttyTCU0,115200 video=tegrafb earlycon=tegra_comb_uart,mmio32,0x0c168000 gpt rootfs.slot_suffix= tegra_fbmem=0x800000@0xa06b1000 lut_mem=0x2008@0xa06ae000 usbcore.old_scheme_first=1 tegraid=19.1.2.0.0 maxcpus=6 boot.slot_suffix= boot.ratchetvalues=0.4.2 vpr_resize sdhci_tegra.en_boot_part_access=1 quiet root=/dev/mmcblk0p1 rw rootwait rootfstype=ext4 console=ttyTCU0,115200n8 console=tty0 fbcon=map:0 net.ifnames=0
[ 0.000734] console [tty0] enabled

[ 1.542883] 3100000.serial: ttyTHS0 at MMIO 0x3100000 (irq = 47, base_baud = 0) is a TEGRA_UART

[ 1.544086] 3110000.serial: ttyTHS1 at MMIO 0x3110000 (irq = 48, base_baud = 0) is a TEGRA_UART
[ 1.544947] 3140000.serial: ttyTHS4 at MMIO 0x3140000 (irq = 49, base_baud = 0) is a TEGRA_UART
[ 1.546266] console [ttyTCU0] enabled

but do not get any debug/console logs

My requirement is to get debug logs either on ttyTCU0 or ttyTHS1 in NX.

hello vbhm,

don’t they’re the logs you’ve populate to the uart ports?

these logs are from machines desktop CLI

hello vbhm,

are you having same hardware design for Nano and Xavier NX? (i.e. 10kohm PU resistor)
if yes, please try to remove that since Xavier NX have level shift, thanks