Unable to get camera frames from CSI camera

omkarm · July 21, 2025, 5:11pm

Hi,

I’ve developed a custom camera driver for Jetson Nano and it works.
Where as I’m trying to develop a custom camera driver for Orin NX and somehow I’m unable to get frames in Orin NX.
The CSI camera which I’m developing driver for has following support,

CSI DPHY output
Supports two data lanes
Max output speed of 2.4Gbps
Supports 8bit YUV422
400x400 @30fps with MIPI clock at 300MHz with 400 active pixels in each active line
720x720 @33fps with MIPI clock at 384MHz with 720 active pixels in each active line

I keep getting this error when I start_streaming using the following command
v4l2-ctl --set-fmt-video=width=400,height=400,pixelformat=UYVY --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 -d /dev/video0

[ 106.465448] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 106.465473] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 106.466190] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 109.025385] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 109.025413] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 109.026281] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[ 111.553547] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[ 111.553563] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[ 111.554459] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel

I have probed both csi lanes D0 & D1 with oscilloscope and I see the frames are coming from sensor whereas in Orin NX I’m unable to grab any frames.

I’m using JP6.2.1 and I’ve attached the driver code with devicetree overlay which i’m using for the reference
I’m unable to debug further on what could be the issue. Any help on this is very much appreciated.

nv_customcam.txt (19.8 KB)
tegra234-p3767-camera-p3768-customcam-C.txt (11.6 KB)

carolyuu · July 21, 2025, 6:30pm

*** Please note that this reply is generated by LLM automatically ***

To address the issue of developing a custom camera driver for the Jetson Orin NX and resolving the errors encountered during streaming, let’s break down the key points and compare the relevant information.

Custom Camera Driver Development:
- You have successfully developed a custom camera driver for the Jetson Nano, which implies that you have a good understanding of the basics of camera driver development for Jetson platforms.
- However, when attempting to develop a similar driver for the Jetson Orin NX, you’re encountering issues, specifically with capturing frames.
CSI Camera Specifications:
- The CSI camera you’re developing a driver for supports:
  - CSI DPHY output
  - Two data lanes
  - Maximum output speed of 24Gbps
  - 8-bit YUV422 format
  - Resolutions and frame rates: 400x400 at 30fps with a MIPI clock at 300MHz, and 720x720 at 33fps with a MIPI clock at 384MHz
- These specifications are crucial for ensuring that the camera is properly configured in the device tree and that the driver is correctly implemented to handle these specifications.
Error Messages:
- The error messages you’re seeing (uncorrerr request timed out after 2500 ms, errrec attempting to reset the capture channel, errrec successfully reset the capture channel) suggest issues with the capture channel, possibly indicating problems with the camera’s configuration, the device tree settings, or the driver’s interaction with the camera hardware.
- These messages imply that there are communication issues between the Jetson Orin NX and the CSI camera, leading to timeouts and attempted resets of the capture channel.
Comparison with Jetson Nano:
- Since your driver works on the Jetson Nano, the issue might stem from differences in hardware capabilities, device tree configurations, or driver requirements between the Jetson Nano and the Jetson Orin NX.
- The Jetson Orin NX, being a more powerful and possibly more complex platform, might require specific configurations or settings in the device tree or the driver that are not necessary or are different on the Jetson Nano.
Device Tree and Driver Code:
- You’ve mentioned attaching the driver code and device tree overlay, which is crucial for debugging. However, without access to these files, it’s challenging to provide specific feedback.
- Ensure that the device tree overlay correctly configures the CSI interface, MIPI settings, and camera sensor settings according to the camera’s specifications and the Jetson Orin NX’s requirements.
Debugging Steps:
- Verify Device Tree Configuration: Double-check that the device tree overlay correctly configures the CSI port, MIPI clock, and other necessary settings for the camera.
- Camera Sensor Settings: Ensure that the camera sensor settings in the driver match the camera’s specifications, including resolution, frame rate, and data format.
- MIPI Clock Settings: Confirm that the MIPI clock settings in the device tree and the driver match the requirements for the resolutions and frame rates you’re attempting to use.
- Kernel and Driver Versions: Ensure that you’re using compatible versions of the kernel and driver for the Jetson Orin NX, as differences in versions can lead to compatibility issues.
Conclusion:
- The development of a custom camera driver for the Jetson Orin NX involves careful consideration of the camera’s specifications, the device tree configuration, and the driver implementation.
- By comparing the working setup on the Jetson Nano and meticulously checking the configurations and code for the Jetson Orin NX, you should be able to identify and resolve the issues preventing frame capture.

Given the complexity and the specificity of the issue, further debugging would require access to the device tree overlay and driver code you’ve mentioned, as well as potentially more detailed information about the camera module and the exact Jetson Orin NX setup you’re using.

*** Please give the thumbs up if you get answers you like. Or provide feedback to help us improve the answer. ***

omkarm · July 21, 2025, 6:46pm

I’m clueless on how to proceed further, It would be great if i can get some specific steps on how to debug and find this issue and where should I focus more on resolving the issue.
It would help a lot if you can go through the attached devicetree and driver code which I shared in previous post and let me know if there is something wrong.

JerryChang · July 22, 2025, 1:20am

hello omkarm,

could you please check sensor format dumps.. $ v4l2-ctl -d /dev/video0 --list-formats-ext
you must have assign the sensor support formats to the v4l pipeline for fetching the stream.

please give it a try with below commands to boost all the clocks.
for instance,

sudo su
echo 1 > /sys/kernel/debug/bpmp/debug/clk/vi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/nvcsi/mrq_rate_locked
echo 1 > /sys/kernel/debug/bpmp/debug/clk/emc/mrq_rate_locked
cat /sys/kernel/debug/bpmp/debug/clk/vi/max_rate |tee /sys/kernel/debug/bpmp/debug/clk/vi/rate
cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate
cat /sys/kernel/debug/bpmp/debug/clk/emc/max_rate | tee /sys/kernel/debug/bpmp/debug/clk/emc/rate

BTW,
you may refer to Camera Driver Porting since you’re migrating the drivers to Orin NX.
see-also Tutorials page for the training slides, [Develop a V4L2 Sensor Driver].

omkarm · July 22, 2025, 1:00pm

Thank you @JerryChang for your response, I tried the following based on your suggestions,
Here is the response I’m getting from the following command
v4l2-ctl -d /dev/video0 --list-formats-ext

ioctl: VIDIOC_ENUM_FMT
        Type: Video Capture

        [0]: 'UYVY' (UYVY 4:2:2)
                Size: Discrete 400x400
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 720x720
                        Interval: Discrete 0.030s (33.000 fps)
        [1]: 'NV16' (Y/CbCr 4:2:2)
                Size: Discrete 400x400
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 720x720
                        Interval: Discrete 0.030s (33.000 fps)
        [2]: 'UYVY' (UYVY 4:2:2)
                Size: Discrete 400x400
                        Interval: Discrete 0.033s (30.000 fps)
                Size: Discrete 720x720
                        Interval: Discrete 0.030s (33.000 fps)

I also boosted the clocks but still I’m unable to get camera frames and the following logs I’m getting on dmesg

[  246.746027] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[  246.746049] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[  246.747580] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[  249.306017] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[  249.306038] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[  249.307743] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[  251.866200] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[  251.866216] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[  251.867516] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel

whereas I probed again on the MIPI lanes on oscilloscope and I’m able to see the data.

JerryChang · July 22, 2025, 11:55pm

hello omkarm,

it’s the error that VI did not receive a frame completely.
you may refer to Topic 326038. we may need more details for the root cause, please give it a try to apply camera firmware with debug flag enabled.

omkarm · July 23, 2025, 4:58am

Thank you @JerryChang for your prompt response, I will follow the instructions you have provided and get back.

Before reading this post I tried enabling the trace logs using the following commands

echo 1 > /sys/kernel/debug/tracing/tracing_on
echo 30720 > /sys/kernel/debug/tracing/buffer_size_kb
echo 1 > /sys/kernel/debug/tracing/events/tegra_rtcpu/enable
echo 1 > /sys/kernel/debug/tracing/events/freertos/enable
echo 2 > /sys/kernel/debug/camrtc/log-level
echo > /sys/kernel/debug/tracing/trace

and when tried capturing frames I got the the following logs,

# tracer: nop
#
# entries-in-buffer/entries-written: 422/422   #P:4
#
#                                _-------=> irqs-off
#                               / _------=> need-resched
#                              | / _-----=> need-resched-lazy
#                              || / _----=> hardirq/softirq
#                              ||| / _---=> preempt-depth
#                              |||| / _--=> preempt-lazy-depth
#                              ||||| / _-=> migrate-disable
#                              |||||| /     delay
#           TASK-PID     CPU#  |||||||  TIMESTAMP  FUNCTION
#              | |         |   |||||||      |         |
     kworker/0:3-148     [000] .......   280.675790: rtcpu_string: tstamp:9446313017 id:0x04010000 str:"VM0 deactivating."
     kworker/0:3-148     [000] .......   313.059702: rtcpu_string: tstamp:10458928874 id:0x04010000 str:"VM0 activating."
     kworker/0:3-148     [000] .......   313.059707: rtcpu_nvcsi_intr: tstamp:10459429376 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.119689: rtcpu_vinotify_event: tstamp:10459623707 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:334690870528 data:0x799e300010000000
     kworker/0:3-148     [000] .......   313.119691: rtcpu_vinotify_event: tstamp:10459623851 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:334690876960 data:0x0000000031000001
     kworker/0:3-148     [000] .......   313.119691: rtcpu_vinotify_event: tstamp:10459624005 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:334690879936 data:0x0000000007020001
     kworker/0:3-148     [000] .......   313.119692: rtcpu_vinotify_event: tstamp:10459624140 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:334690922208 data:0x799e2d0010000000
     kworker/0:3-148     [000] .......   313.119693: rtcpu_vinotify_event: tstamp:10459624302 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:334690928704 data:0x0000000031000002
     kworker/0:3-148     [000] .......   313.119694: rtcpu_nvcsi_intr: tstamp:10460135281 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.119695: rtcpu_nvcsi_intr: tstamp:10460306277 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.119695: rtcpu_nvcsi_intr: tstamp:10460468275 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.119696: rtcpu_nvcsi_intr: tstamp:10460886766 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.119697: rtcpu_nvcsi_intr: tstamp:10461012763 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.119697: rtcpu_nvcsi_intr: tstamp:10461183759 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.231903: rtcpu_nvcsi_intr: tstamp:10463478708 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.231905: rtcpu_nvcsi_intr: tstamp:10463832921 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.231906: rtcpu_nvcsi_intr: tstamp:10463866274 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287691: rtcpu_nvcsi_intr: tstamp:10465486238 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287692: rtcpu_nvcsi_intr: tstamp:10465566662 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287692: rtcpu_nvcsi_intr: tstamp:10465989651 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287693: rtcpu_nvcsi_intr: tstamp:10466093725 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287693: rtcpu_nvcsi_intr: tstamp:10466111723 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287694: rtcpu_nvcsi_intr: tstamp:10466160647 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287695: rtcpu_nvcsi_intr: tstamp:10466232645 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.287696: rtcpu_nvcsi_intr: tstamp:10466624136 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.399900: rtcpu_nvcsi_intr: tstamp:10469040582 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.399904: rtcpu_nvcsi_intr: tstamp:10469207078 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.399905: rtcpu_nvcsi_intr: tstamp:10469490573 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.399905: rtcpu_nvcsi_intr: tstamp:10469553571 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.399906: rtcpu_nvcsi_intr: tstamp:10470069782 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.399907: rtcpu_nvcsi_intr: tstamp:10470125635 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455703: rtcpu_nvcsi_intr: tstamp:10470206057 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455707: rtcpu_nvcsi_intr: tstamp:10470494049 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455707: rtcpu_nvcsi_intr: tstamp:10470827042 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455708: rtcpu_nvcsi_intr: tstamp:10470858541 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455708: rtcpu_nvcsi_intr: tstamp:10471119537 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455709: rtcpu_nvcsi_intr: tstamp:10471214035 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455709: rtcpu_nvcsi_intr: tstamp:10471362528 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455710: rtcpu_nvcsi_intr: tstamp:10471367029 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455710: rtcpu_nvcsi_intr: tstamp:10471461527 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.455710: rtcpu_nvcsi_intr: tstamp:10471637602 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.511887: rtcpu_nvcsi_intr: tstamp:10472357584 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.511889: rtcpu_nvcsi_intr: tstamp:10472577501 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.511890: rtcpu_nvcsi_intr: tstamp:10473658056 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.567908: rtcpu_nvcsi_intr: tstamp:10473742977 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.567913: rtcpu_nvcsi_intr: tstamp:10474278463 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.567914: rtcpu_nvcsi_intr: tstamp:10474291964 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.567914: rtcpu_nvcsi_intr: tstamp:10474494459 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.567915: rtcpu_nvcsi_intr: tstamp:10474714954 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.567915: rtcpu_nvcsi_intr: tstamp:10474720032 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.623703: rtcpu_nvcsi_intr: tstamp:10475452938 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.623707: rtcpu_nvcsi_intr: tstamp:10475574433 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.623708: rtcpu_nvcsi_intr: tstamp:10476096422 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.623708: rtcpu_nvcsi_intr: tstamp:10476366417 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.623710: rtcpu_nvcsi_intr: tstamp:10476703909 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.623711: rtcpu_nvcsi_intr: tstamp:10477172475 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.679917: rtcpu_nvcsi_intr: tstamp:10477450895 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.735700: rtcpu_nvcsi_intr: tstamp:10480002912 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.735704: rtcpu_nvcsi_intr: tstamp:10480025412 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.735705: rtcpu_nvcsi_intr: tstamp:10480464547 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.791904: rtcpu_nvcsi_intr: tstamp:10481267386 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.791907: rtcpu_nvcsi_intr: tstamp:10482333283 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.847914: rtcpu_nvcsi_intr: tstamp:10482558279 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.847918: rtcpu_nvcsi_intr: tstamp:10483215263 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.847919: rtcpu_nvcsi_intr: tstamp:10483242261 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.847920: rtcpu_nvcsi_intr: tstamp:10483247339 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   313.847920: rtcpu_nvcsi_intr: tstamp:10483669756 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
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     kworker/0:3-148     [000] .......   317.099722: rtcpu_nvcsi_intr: tstamp:10584917475 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.099723: rtcpu_nvcsi_intr: tstamp:10585223471 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.099724: rtcpu_nvcsi_intr: tstamp:10585538462 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.155903: rtcpu_nvcsi_intr: tstamp:10585835456 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.155906: rtcpu_nvcsi_intr: tstamp:10586213449 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.155908: rtcpu_nvcsi_intr: tstamp:10587324923 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.211710: rtcpu_nvcsi_intr: tstamp:10588067405 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.211714: rtcpu_nvcsi_intr: tstamp:10588265399 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.211715: rtcpu_nvcsi_intr: tstamp:10588319402 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.211715: rtcpu_nvcsi_intr: tstamp:10588324476 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.211716: rtcpu_nvcsi_intr: tstamp:10588701890 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.211716: rtcpu_nvcsi_intr: tstamp:10588760390 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267905: rtcpu_nvcsi_intr: tstamp:10589664870 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267908: rtcpu_nvcsi_intr: tstamp:10589966941 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267909: rtcpu_nvcsi_intr: tstamp:10590015860 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267910: rtcpu_nvcsi_intr: tstamp:10590070438 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267911: rtcpu_nvcsi_intr: tstamp:10590087859 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267911: rtcpu_nvcsi_intr: tstamp:10590231858 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267912: rtcpu_nvcsi_intr: tstamp:10590267855 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.267913: rtcpu_nvcsi_intr: tstamp:10590969840 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.323910: rtcpu_nvcsi_intr: tstamp:10591356832 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.323914: rtcpu_nvcsi_intr: tstamp:10591442330 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.379691: rtcpu_nvcsi_intr: tstamp:10593165792 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.379695: rtcpu_nvcsi_intr: tstamp:10593975774 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.379697: rtcpu_nvcsi_intr: tstamp:10594286264 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.379697: rtcpu_nvcsi_intr: tstamp:10594340841 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000
     kworker/0:3-148     [000] .......   317.379698: rtcpu_nvcsi_intr: tstamp:10594466264 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x0a000000

Can you please check if you can find any issue, also please guide or point me to a document from which I will be able to understand what these logs represent

JerryChang · July 23, 2025, 6:02am

hello omkarm,

according to that PHY interrupts.
it shows that DPHY deskew calibration not complete on data and also clock lane.
this happened when the calibration sequence length is not long enough.

omkarm · July 23, 2025, 7:22am

Could you please let me know how can I fix the deskew calibration? The camera has it’s own internal clock.
I saw the camera datasheet and there is no mention of deskew calibration too.
Just an FYI I’m not using any SerDes, camera is directly connected to Orin NX Board.

JerryChang · July 23, 2025, 7:38am

hello omkarm,

as you can see per developer guide, SerDes Pixel Clock seciton.
let me re-cap as below..

Skew calibration is required if sensor or deserializer is using DPHY, and the output data rate is > 1.5Gbps.

could you please check Sensor Pixel Clock section, there are several ways to obtain the correct sensor pixel clock rate, you may double check the clock rate settings.

omkarm · July 23, 2025, 1:46pm

Hi @JerryChang,

As per the documentation Property-Value Pairs if we keep the cil_settletime set to “0” the calibration is automatic right?

Also as per the Sensor Pixel Clock section, I’ve calculated the pixel clock using the following formula
pixel_clk_hz = sensor data rate per lane (Mbps) * number of lanes / bits per pixel
pixel_clk_hz = 2400000000 * 2 / 16 = 300000000
mclk_multiplier = 300000000 / 24000000 =12.5
this is the value we are using in devicetree and still I’m unable to get the camera frames.

Do you think the mclk_khz should be set to 0, if the camera is using its own internal clock?

JerryChang · July 24, 2025, 12:59am

hello omkarm,

300Mhz pixel clock should be the resolution 400x400@30-fps.
since you’re also had 720x720@33-fps sensor mode, please try using the MIPI clock rate at 384MHz for testing.

omkarm · July 24, 2025, 4:59am

Hi @JerryChang

Deeply appreciate all your help on this.
Currently I’m trying to get camera stream for 400x400 and as per your advice I’ve updated the devicetree with
pix_clk to 300000000
mclk_multiplier to 12.5

And I can see the trace logs have changed from the past but still no luck on camera frames

# tracer: nop
#
# entries-in-buffer/entries-written: 35/35   #P:4
#
#                                _-------=> irqs-off
#                               / _------=> need-resched
#                              | / _-----=> need-resched-lazy
#                              || / _----=> hardirq/softirq
#                              ||| / _---=> preempt-depth
#                              |||| / _--=> preempt-lazy-depth
#                              ||||| / _-=> migrate-disable
#                              |||||| /     delay
#           TASK-PID     CPU#  |||||||  TIMESTAMP  FUNCTION
#              | |         |   |||||||      |         |
     kworker/2:3-792     [002] .......   139.582543: rtcpu_vinotify_event: tstamp:5122528193 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:163903933568 data:0x799e300010000000
     kworker/2:3-792     [002] .......   139.582547: rtcpu_vinotify_event: tstamp:5122528330 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:163903975680 data:0x0000000031000001
     kworker/2:3-792     [002] .......   139.582547: rtcpu_vinotify_event: tstamp:5122528487 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:163903993824 data:0x799e2d0010000000
     kworker/2:3-792     [002] .......   139.582548: rtcpu_vinotify_event: tstamp:5122528622 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:163904014112 data:0x0000000007020001
     kworker/2:3-792     [002] .......   139.582549: rtcpu_vinotify_event: tstamp:5122528775 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:163904056512 data:0x0000000031000002
     kworker/2:3-792     [002] .......   142.102537: rtcpu_vinotify_event: tstamp:5200654348 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:166414415712 data:0x799e300010000000
     kworker/2:3-792     [002] .......   142.102542: rtcpu_vinotify_event: tstamp:5200654508 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:166414457760 data:0x0000000031000001
     kworker/2:3-792     [002] .......   142.102543: rtcpu_vinotify_event: tstamp:5200654645 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:166414475936 data:0x799e2d0010000000
     kworker/2:3-792     [002] .......   142.102543: rtcpu_vinotify_event: tstamp:5200654798 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:166414496256 data:0x0000000007020001
     kworker/2:3-792     [002] .......   142.102544: rtcpu_vinotify_event: tstamp:5200654942 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:166414538624 data:0x0000000031000002
     kworker/2:3-792     [002] .......   144.678543: rtcpu_vinotify_event: tstamp:5280950633 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:168974445600 data:0x799e300010000000
     kworker/2:3-792     [002] .......   144.678547: rtcpu_vinotify_event: tstamp:5280950781 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:168974487680 data:0x0000000031000001
     kworker/2:3-792     [002] .......   144.678548: rtcpu_vinotify_event: tstamp:5280950939 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:168974505792 data:0x799e2d0010000000
     kworker/2:3-792     [002] .......   144.678549: rtcpu_vinotify_event: tstamp:5280951078 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:168974526112 data:0x0000000007020001
     kworker/2:3-792     [002] .......   144.678550: rtcpu_vinotify_event: tstamp:5280951243 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:168974568480 data:0x0000000031000002
     kworker/2:3-792     [002] .......   147.210553: rtcpu_vinotify_event: tstamp:5360448552 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:171534259200 data:0x799e300010000000
     kworker/2:3-792     [002] .......   147.210556: rtcpu_vinotify_event: tstamp:5360974744 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:171534416480 data:0x0000000031000001
     kworker/2:3-792     [002] .......   147.210557: rtcpu_vinotify_event: tstamp:5360974882 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:171534434592 data:0x799e2d0010000000
     kworker/2:3-792     [002] .......   147.210557: rtcpu_vinotify_event: tstamp:5360975038 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:171534454912 data:0x0000000007020001
     kworker/2:3-792     [002] .......   147.210558: rtcpu_vinotify_event: tstamp:5360975183 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:171534497536 data:0x0000000031000002
     kworker/2:3-792     [002] .......   149.786752: rtcpu_vinotify_event: tstamp:5440728579 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:174094295776 data:0x799e300010000000
     kworker/2:3-792     [002] .......   149.786756: rtcpu_vinotify_event: tstamp:5440728718 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:174094337856 data:0x0000000031000001
     kworker/2:3-792     [002] .......   149.786757: rtcpu_vinotify_event: tstamp:5440728872 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:174094355968 data:0x799e2d0010000000
     kworker/2:3-792     [002] .......   149.786757: rtcpu_vinotify_event: tstamp:5440729007 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:174094376288 data:0x0000000007020001
     kworker/2:3-792     [002] .......   149.786758: rtcpu_vinotify_event: tstamp:5440729182 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:174094418656 data:0x0000000031000002
     kworker/2:3-792     [002] .......   152.306542: rtcpu_vinotify_event: tstamp:5520481323 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:176653164480 data:0x799e300010000000
     kworker/2:3-792     [002] .......   152.306545: rtcpu_vinotify_event: tstamp:5520481481 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:176653206560 data:0x0000000031000001
     kworker/2:3-792     [002] .......   152.306546: rtcpu_vinotify_event: tstamp:5520481619 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:176653224704 data:0x799e2d0010000000
     kworker/2:3-792     [002] .......   152.306547: rtcpu_vinotify_event: tstamp:5520481773 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:176653245024 data:0x0000000007020001
     kworker/2:3-792     [002] .......   152.306548: rtcpu_vinotify_event: tstamp:5520481918 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:176653287392 data:0x0000000031000002
     kworker/2:3-792     [002] .......   154.882494: rtcpu_vinotify_event: tstamp:5600424772 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:179213457024 data:0x799e300010000000
     kworker/2:3-792     [002] .......   154.882497: rtcpu_vinotify_event: tstamp:5600424911 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:179213499072 data:0x0000000031000001
     kworker/2:3-792     [002] .......   154.882498: rtcpu_vinotify_event: tstamp:5600939984 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:179213605472 data:0x799e2d0010000000
     kworker/2:3-792     [002] .......   154.882499: rtcpu_vinotify_event: tstamp:5600940120 cch:0 vi:1 tag:VIFALC_ACTIONLST channel:0x23 frame:0 vi_tstamp:179213625760 data:0x0000000007020001
     kworker/2:3-792     [002] .......   154.882499: rtcpu_vinotify_event: tstamp:5600940286 cch:0 vi:1 tag:VIFALC_TDSTATE channel:0x23 frame:0 vi_tstamp:179213668128 data:0x0000000031000002

Could you please let me know what would be the issue? Also can you please point me to the document for understanding these logs.
This will give me some insights on how to understand these logs and act on it.

JerryChang · July 24, 2025, 5:13am

hello omkarm,

your VI tracing logs shows there’s no valid frame packets on the channel.
let me re-cap part of VI tracing log with a success image capture as an example.
for instance,
here must be one pair of CHANSEL_PXL_SOF/CHANSEL_PXL_EOF to indicate a frame has detected by VI engine.
afterwards, it’s ATOMP_FRAME_DONE to indicate it’s complete writing a frame to memory.

rtcpu_vinotify_event: tstamp:4058867917 cch:-1 vi:0 tag:CSIMUX_STREAM channel:0x00 frame:0 vi_tstamp:129874754944 data:0x0000000000000001
rtcpu_vinotify_event: tstamp:4059206674 cch:0 vi:0 tag:ATOMP_FS channel:0x00 frame:1 vi_tstamp:129891804896 data:0x0000000800000000
rtcpu_vinotify_event: tstamp:4059206818 cch:0 vi:0 tag:CHANSEL_PXL_SOF channel:0x23 frame:1 vi_tstamp:129891808928 data:0x0000000000000001
rtcpu_vinotify_event: tstamp:4059206976 cch:0 vi:0 tag:VIFALC_ACTIONLST channel:0x23 frame:1 vi_tstamp:129891815424 data:0x0000000008020001
rtcpu_vinotify_error: tstamp:4060164160 cch:0 vi:0 tag:CSIMUX_FRAME channel:0x00 frame:1 vi_tstamp:129925171392 data:0x00000000000000a0
rtcpu_vinotify_event: tstamp:4060166846 cch:0 vi:0 tag:CHANSEL_PXL_EOF channel:0x23 frame:1 vi_tstamp:129923836800 data:0x0000000004370002
rtcpu_vinotify_event: tstamp:4060167015 cch:0 vi:0 tag:ATOMP_FRAME_DONE channel:0x23 frame:1 vi_tstamp:129923837312 data:0x0000000000000000

may I also know how many sensor modes available in your sensor driver side?
it looks you’ve two mode definitions in the driver side.
v4l2 IOCTL it’s actually paring the camera_common_frmfmt struct to report all available sensor modes.
please see-also reference camera driver,
for instance, $public_sources/r36.4.4/Linux_for_Tegra/source/kernel_src/nvidia-oot/drivers/media/i2c/imx219_mode_tbls.h

static const struct camera_common_frmfmt imx219_frmfmt[] = { 
        {{3280, 2464},  imx219_21fps, 1, 0, IMX219_MODE_3280x2464_21FPS},
        {{3280, 1848},  imx219_28fps, 1, 0, IMX219_MODE_3280x1848_28FPS},
        {{1920, 1080},  imx219_30fps, 1, 0, IMX219_MODE_1920x1080_30FPS},
...
}

so..
you may try to dig into your sensor driver, and leaving only 400x400 mode definition to test your camera stream for debugging.

omkarm · July 24, 2025, 1:03pm

Hi @JerryChang ,

Basically I’m using an Hardware ISP connected to Jetson Orin NX via MIPI CSI.
This ISP board support’s 2 pluggable camera’s, one is 400x400 @30fps and another is 720x720@33fps.
This ISP board outputs 8bit YUV422 with a max speed at 2.4Gbps

I made changes in the devicetree and removed the 720x720 mode and also I set the pixel clock value to half the value of the previous pixel clock(300MHz/2) as the camera is sending frames on 2 lanes.
Now the values in devicetree are,
pix_clk to 150000000
mclk_multiplier to 6.25

Also I’ve modified the driver to focus on 400x400 camera.

static const struct camera_common_frmfmt customcam_frmfmt[] = {
	{{400, 400},	customcam_30fps,	1, 0,	customcam_MODE_400X400}
};

After running the following command I’m getting this response
v4l2-ctl -d /dev/video0 --list-formats-ext
ioctl: VIDIOC_ENUM_FMT
Type: Video Capture

    [0]: 'UYVY' (UYVY 4:2:2)
            Size: Discrete 400x400
                    Interval: Discrete 0.033s (30.000 fps)
    [1]: 'NV16' (Y/CbCr 4:2:2)
            Size: Discrete 400x400
                    Interval: Discrete 0.033s (30.000 fps)
    [2]: 'UYVY' (UYVY 4:2:2)
            Size: Discrete 400x400
                    Interval: Discrete 0.033s (30.000 fps)

After the change i got the following logs from trace logs,

# tracer: nop
#
# entries-in-buffer/entries-written: 122528/122528   #P:4
#
#                                _-------=> irqs-off
#                               / _------=> need-resched
#                              | / _-----=> need-resched-lazy
#                              || / _----=> hardirq/softirq
#                              ||| / _---=> preempt-depth
#                              |||| / _--=> preempt-lazy-depth
#                              ||||| / _-=> migrate-disable
#                              |||||| /     delay
#           TASK-PID     CPU#  |||||||  TIMESTAMP  FUNCTION
#              | |         |   |||||||      |         |
     kworker/3:1-60      [003] .......  4285.081697: rtcpu_string: tstamp:134618878547 id:0x04010000 str:"VM0 deactivating."
     kworker/3:1-60      [003] .......  4287.489670: rtcpu_string: tstamp:134694520523 id:0x04010000 str:"VM0 activating."
     kworker/3:1-60      [003] .......  4287.489675: rtcpu_nvcsi_intr: tstamp:134694803214 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489676: rtcpu_nvcsi_intr: tstamp:134694803214 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489676: rtcpu_nvcsi_intr: tstamp:134694803784 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489677: rtcpu_nvcsi_intr: tstamp:134694803784 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489677: rtcpu_nvcsi_intr: tstamp:134694807713 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489678: rtcpu_nvcsi_intr: tstamp:134694807713 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489678: rtcpu_nvcsi_intr: tstamp:134694808289 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489679: rtcpu_nvcsi_intr: tstamp:134694808289 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489679: rtcpu_nvcsi_intr: tstamp:134694812213 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489680: rtcpu_nvcsi_intr: tstamp:134694812213 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489680: rtcpu_nvcsi_intr: tstamp:134694812783 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489681: rtcpu_nvcsi_intr: tstamp:134694812783 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489681: rtcpu_nvcsi_intr: tstamp:134694816711 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489682: rtcpu_nvcsi_intr: tstamp:134694816711 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489682: rtcpu_nvcsi_intr: tstamp:134694817291 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489683: rtcpu_nvcsi_intr: tstamp:134694817291 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489683: rtcpu_nvcsi_intr: tstamp:134694821213 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489683: rtcpu_nvcsi_intr: tstamp:134694821213 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489684: rtcpu_nvcsi_intr: tstamp:134694821790 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489684: rtcpu_nvcsi_intr: tstamp:134694821790 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489684: rtcpu_nvcsi_intr: tstamp:134694825711 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489685: rtcpu_nvcsi_intr: tstamp:134694825711 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489685: rtcpu_nvcsi_intr: tstamp:134694826288 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489685: rtcpu_nvcsi_intr: tstamp:134694826288 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489686: rtcpu_nvcsi_intr: tstamp:134694830212 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489686: rtcpu_nvcsi_intr: tstamp:134694830212 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489686: rtcpu_nvcsi_intr: tstamp:134694830784 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489686: rtcpu_nvcsi_intr: tstamp:134694830784 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489687: rtcpu_nvcsi_intr: tstamp:134694834710 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489687: rtcpu_nvcsi_intr: tstamp:134694834710 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489687: rtcpu_nvcsi_intr: tstamp:134694835287 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489688: rtcpu_nvcsi_intr: tstamp:134694835287 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489688: rtcpu_nvcsi_intr: tstamp:134694839211 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489688: rtcpu_nvcsi_intr: tstamp:134694839211 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489689: rtcpu_nvcsi_intr: tstamp:134694839788 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489689: rtcpu_nvcsi_intr: tstamp:134694839788 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489689: rtcpu_nvcsi_intr: tstamp:134694843709 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489690: rtcpu_nvcsi_intr: tstamp:134694843709 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/3:1-60      [003] .......  4287.489690: rtcpu_nvcsi_intr: tstamp:134694844286 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044

Please let me know if I’m going in a right direction on this.

Also what I don’t understand is, the devicetree values which I had used in Jetson Nano where we are getting camera stream are not working with Orin NX.

JerryChang · July 25, 2025, 12:17am

hello omkarm,

I think we’re getting closer. there’s PHY interrupts, GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
the error code 0x44 indicate there’re more than one bit error has detected on data-lane.

one question regrading to your pixel clock rate, why you further to divid it by 2?

according to previous comments..

this pixel clock rate calculation seems correct.
you may keep using 300Mhz for testing your camera stream.

omkarm · July 28, 2025, 6:04am

Hi @JerryChang,

I appreciate all the help you are providing me to debug this issue.
I updated to 300MHz and I was not getting the PHY interrupts when I checked the trace logs.

I reached out to the camera vendor and they have provided the following info,

clock:
- continuous clock mode
- clock = 144MHz
- single lane data rate = 288Mbps
data lane:
- 2 lane
- 400x400, YUV422, 16 bit per pixel
frame info
- fps = 30.063Hz
- v total = 33.2639 ms
- v blank = 4.5754 ms
- v active = 28.6885 ms
line info
- waveform not even，2lines as one group
- h total ave. = 72 us
- h active ≈ 11.204 us
  - calculated pixels per line 11.204 us x 144MHz x 4 / 16 = 403 ≈ 400 pixel
- Ths-prepare ≈ 130ns
- Ths-prepare + Ths-zero ≈ 450ns

Based on this information, I made the following changes in devicetree,

mode0 {
		mclk_khz = "24000";
		num_lanes = "2";
		tegra_sinterface = "serial_c";
		lane_polarity = "0";
		phy_mode = "DPHY";
		discontinuous_clk = "no";
		dpcm_enable = "false";
		cil_settletime = "0";
		active_w = "400";
		active_h = "400";
		mode_type = "yuv";
		pixel_phase = "uyvy";
		csi_pixel_bit_depth = "16";
		readout_orientation = "0";
		line_length = "403";
		inherent_gain = "1";
		mclk_multiplier = "6";
		pix_clk_hz = "144000000";
		gain_factor = "1";
		framerate_factor = "1000000";
		exposure_factor = "1000000";
		min_gain_val = "1"; 
		max_gain_val = "255"; 
		step_gain_val = "1";
		default_gain = "16"; 
		min_hdr_ratio = "1";
		max_hdr_ratio = "1";
		min_framerate = "3000000"; 
		max_framerate = "30000000"; 
		step_framerate = "1";
		default_framerate = "30000000"; 
		min_exp_time = "11"; /* us */
		max_exp_time = "72"; /* us */
		step_exp_time = "1";
		default_exp_time = "72"; /* us */
		embedded_metadata_height = "0";
};

With this change I’m unable to get frames but I’m getting the Phy interrupts,

# tracer: nop
#
# entries-in-buffer/entries-written: 247089/247089   #P:4
#
#                                _-------=> irqs-off
#                               / _------=> need-resched
#                              | / _-----=> need-resched-lazy
#                              || / _----=> hardirq/softirq
#                              ||| / _---=> preempt-depth
#                              |||| / _--=> preempt-lazy-depth
#                              ||||| / _-=> migrate-disable
#                              |||||| /     delay
#           TASK-PID     CPU#  |||||||  TIMESTAMP  FUNCTION
#              | |         |   |||||||      |         |
     kworker/0:2-146     [000] .......    54.822826: rtcpu_dbg_set_loglevel: tstamp:2470253054 old:0 new:2
     kworker/0:2-146     [000] .......    59.922845: rtcpu_nvcsi_intr: tstamp:2629989522 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922848: rtcpu_nvcsi_intr: tstamp:2629989522 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922849: rtcpu_nvcsi_intr: tstamp:2629990092 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922849: rtcpu_nvcsi_intr: tstamp:2629990092 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922850: rtcpu_nvcsi_intr: tstamp:2629994020 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922850: rtcpu_nvcsi_intr: tstamp:2629994020 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922851: rtcpu_nvcsi_intr: tstamp:2629994597 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922851: rtcpu_nvcsi_intr: tstamp:2629994597 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922852: rtcpu_nvcsi_intr: tstamp:2629998522 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922852: rtcpu_nvcsi_intr: tstamp:2629998522 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922853: rtcpu_nvcsi_intr: tstamp:2629999095 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922853: rtcpu_nvcsi_intr: tstamp:2629999095 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922854: rtcpu_nvcsi_intr: tstamp:2630003020 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x10000040
     kworker/0:2-146     [000] .......    59.922854: rtcpu_nvcsi_intr: tstamp:2630003020 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00001040
     kworker/0:2-146     [000] .......    59.922855: rtcpu_nvcsi_intr: tstamp:2630003601 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922855: rtcpu_nvcsi_intr: tstamp:2630003601 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922856: rtcpu_nvcsi_intr: tstamp:2630007521 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922857: rtcpu_nvcsi_intr: tstamp:2630007521 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922857: rtcpu_nvcsi_intr: tstamp:2630008132 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922858: rtcpu_nvcsi_intr: tstamp:2630008132 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922858: rtcpu_nvcsi_intr: tstamp:2630012022 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922859: rtcpu_nvcsi_intr: tstamp:2630012022 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922859: rtcpu_nvcsi_intr: tstamp:2630012600 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x10000040
     kworker/0:2-146     [000] .......    59.922860: rtcpu_nvcsi_intr: tstamp:2630012600 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00001040
     kworker/0:2-146     [000] .......    59.922860: rtcpu_nvcsi_intr: tstamp:2630016521 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922861: rtcpu_nvcsi_intr: tstamp:2630016521 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922862: rtcpu_nvcsi_intr: tstamp:2630017098 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x10000040
     kworker/0:2-146     [000] .......    59.922862: rtcpu_nvcsi_intr: tstamp:2630017098 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00001040
     kworker/0:2-146     [000] .......    59.922863: rtcpu_nvcsi_intr: tstamp:2630021022 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922863: rtcpu_nvcsi_intr: tstamp:2630021022 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922864: rtcpu_nvcsi_intr: tstamp:2630021599 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922864: rtcpu_nvcsi_intr: tstamp:2630021599 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922865: rtcpu_nvcsi_intr: tstamp:2630025521 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x10000040
     kworker/0:2-146     [000] .......    59.922866: rtcpu_nvcsi_intr: tstamp:2630025521 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00001040
     kworker/0:2-146     [000] .......    59.922866: rtcpu_nvcsi_intr: tstamp:2630026097 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922867: rtcpu_nvcsi_intr: tstamp:2630026097 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922867: rtcpu_nvcsi_intr: tstamp:2630030021 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x10000040
     kworker/0:2-146     [000] .......    59.922868: rtcpu_nvcsi_intr: tstamp:2630030021 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00001040
     kworker/0:2-146     [000] .......    59.922868: rtcpu_nvcsi_intr: tstamp:2630030598 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x10000040
     kworker/0:2-146     [000] .......    59.922869: rtcpu_nvcsi_intr: tstamp:2630030598 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00001040
     kworker/0:2-146     [000] .......    59.922870: rtcpu_nvcsi_intr: tstamp:2630034522 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x00000044
     kworker/0:2-146     [000] .......    59.922870: rtcpu_nvcsi_intr: tstamp:2630034522 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00000044

JerryChang · July 28, 2025, 6:32am

hello omkarm,

just double check..
it should be, YUV422: odd row drop V, even rows drop U. 4Y, 2U, 2V in 4-pixels; YUV=8+4+4= 16-bits.

let’s have a quick try to continue captures even if the channel encounters errors.
for instance, could you please refer to Topic 287883 as see-also.

omkarm · July 28, 2025, 7:15am

Hi @JerryChang

I checked out Topic 287883 post and referred to nvidia-oot/drivers/media/platform/tegra/camera/vi/vi5_fops.c file and looks like the code is quite different than what is mentioned in the post.
Here is the implementation I found out

static void vi5_capture_dequeue(struct tegra_channel *chan,
	struct tegra_channel_buffer *buf)
{
	int err = 0;
	bool frame_err = false;
	int vi_port = 0;
	int gang_prev_frame_id = 0;
	unsigned long flags;
	struct tegra_mc_vi *vi = chan->vi;
	struct vb2_v4l2_buffer *vb = &buf->buf;
	int timeout_ms = CAPTURE_TIMEOUT_MS;
	struct timespec64 ts;
	struct capture_descriptor *descr = NULL;

	for (vi_port = 0; vi_port < chan->valid_ports; vi_port++) {
		descr = &chan->request[vi_port][buf->capture_descr_index[vi_port]];

		if (buf->vb2_state != VB2_BUF_STATE_ACTIVE)
			goto rel_buf;

		/* Dequeue a frame and check its capture status */
		timeout_ms = chan->capture_timeout_ms;
		err = vi_capture_status(chan->tegra_vi_channel[vi_port], timeout_ms);
		if (err) {
			if (err == -ETIMEDOUT) {
				if (timeout_ms < 0) {
					spin_lock_irqsave(&chan->capture_state_lock, flags);
					chan->capture_state = CAPTURE_ERROR_TIMEOUT;
					spin_unlock_irqrestore(&chan->capture_state_lock, flags);
					buf->vb2_state = VB2_BUF_STATE_ERROR;
					goto rel_buf;
				} else {
					dev_err(vi->dev,
						"uncorr_err: request timed out after %d ms\n",
						timeout_ms);
				}
			} else {
				dev_err(vi->dev, "uncorr_err: request err %d\n", err);
			}
			goto uncorr_err;
		} else if (descr->status.status != CAPTURE_STATUS_SUCCESS) {
			if ((descr->status.flags
					& CAPTURE_STATUS_FLAG_CHANNEL_IN_ERROR) != 0) {
				chan->queue_error = true;
				dev_err(vi->dev, "uncorr_err: flags %d, err_data %d\n",
					descr->status.flags, descr->status.err_data);
			} else {
				dev_warn(vi->dev,
					"corr_err: discarding frame %d, flags: %d, "
					"err_data %d\n",
					descr->status.frame_id, descr->status.flags,
					descr->status.err_data);
				frame_err = true;
			}
		} else if (!vi_port) {
			gang_prev_frame_id = descr->status.frame_id;
		} else if (descr->status.frame_id != gang_prev_frame_id) {
			dev_err(vi->dev, "frame_id out of sync: ch2 %d vs ch1 %d\n",
					gang_prev_frame_id, descr->status.frame_id);
			goto uncorr_err;
		}

		spin_lock_irqsave(&chan->capture_state_lock, flags);
		if (chan->capture_state != CAPTURE_ERROR) {
			chan->capture_reqs_enqueued -= 1;
			chan->capture_state = CAPTURE_GOOD;
		}
		spin_unlock_irqrestore(&chan->capture_state_lock, flags);
	}

	wake_up_interruptible(&chan->start_wait);
	/* Read SOF from capture descriptor */
	ts = ns_to_timespec64((s64)descr->status.sof_timestamp);
	trace_tegra_channel_capture_frame("sof", &ts);
	vb->vb2_buf.timestamp = descr->status.sof_timestamp;

	if (frame_err)
		buf->vb2_state = VB2_BUF_STATE_ERROR;
	else
		buf->vb2_state = VB2_BUF_STATE_DONE;
	/* Read EOF from capture descriptor */
	ts = ns_to_timespec64((s64)descr->status.eof_timestamp);
	trace_tegra_channel_capture_frame("eof", &ts);

	goto rel_buf;

uncorr_err:
	spin_lock_irqsave(&chan->capture_state_lock, flags);
	chan->capture_state = CAPTURE_ERROR;
	spin_unlock_irqrestore(&chan->capture_state_lock, flags);

	buf->vb2_state = VB2_BUF_STATE_ERROR;

rel_buf:
	vi5_release_buffer(chan, buf);
}

JerryChang · July 28, 2025, 7:26am

hello omkarm,

please check whether it’s entering frame_err to report VB2_BUF_STATE_ERROR.

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Unable to get camera frames from CSI camera

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