AGX orin PIN C61 is GPIO3_PBB.00 in column Customer Usage of Orin_Jetson_Series_Pinmux_Config_Template-v2.1.xlsm.
PORT_BB’s port_offset is 8, so it’s pin number is base + port_offet + pin_offet = 348 + 8 + 0 = 356.
With the “echo 356 > /sys/class/gpio/export”, PB.00 appeared in user space, not PBB.00, why?
Also, PORT_BB’s port_offset and PORT_B’s port_offset is same.
So, what’s the indeed pin number of PIN C61 is GPIO3_PBB.00?
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Based on the provided information, it seems that there is a discrepancy between the expected and actual pin numbering for GPIO3_PBB00 on the Jetson AGX Orin.
According to the OrinJetsonSeriesPinmuxConfigTemplate_v21.xlsm, PIN C61 is indeed GPIO3_PBB00, and the port offset for PORTBB is 8. Using the formula base + port offset + pin offset, we get:
348 (base) + 8 (port offset) + 0 (pin offset) = 356
However, when you export the GPIO using the command “echo 356 > /sys/class/gpio/export”, it appears as PB00 in user space, not PBB00.
There are a few possible explanations for this discrepancy:
- Port offset overlap: As you mentioned, PORTBB’s port offset (8) is the same as PORTB’s port offset. This could indicate that there is an overlap or conflict between the two ports, leading to the incorrect pin numbering.
- Pin numbering convention: It’s possible that the pin numbering convention used in the OrinJetsonSeriesPinmuxConfigTemplate_v21.xlsm is different from the one used in the Linux kernel or the GPIO subsystem. This could result in the same pin being referred to by different names (e.g., PBB00 vs. PB00).
- GPIO numbering: The GPIO subsystem might be using a different numbering scheme than the one used in the pinmux configuration template. This could result in the GPIO being exported with a different name (PB00) than expected (PBB00).
To resolve this issue, you may need to:
- Verify the pin numbering convention used in the OrinJetsonSeriesPinmuxConfigTemplate_v21.xlsm and the Linux kernel or GPIO subsystem.
- Check for any port offset conflicts or overlaps between PORTBB and PORTB.
- Consult the Jetson AGX Orin documentation or contact NVIDIA support for further clarification on the pin numbering and GPIO naming conventions.
In summary, the indeed pin number of PIN C61 is GPIO3_PBB00, but the discrepancy between the expected and actual pin numbering suggests that there may be an issue with the port offset overlap, pin numbering convention, or GPIO numbering. Further investigation is needed to resolve this issue.
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Hi yacht.xin,
Are you using the devkit or custom board for AGX Orin?
What’s the Jetpack version in use?
This pin can be found from the pinmux spreadsheet as following:
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gpiochip1: GPIOs 316-347, parent: platform/c2f0000.gpio, tegra234-gpio-aon:
gpiochip0: GPIOs 348-511, parent: platform/2200000.gpio, tegra234-gpio:
Please note that PB.00 and PBB.00 are from different GPIO controller. (MAIN-GPIO and AON-GPIO)
For PBB.00, it is from AON-GPIO controller and its base GPIO is 316.
I would suggest running the following command for the GPIO number used in sysfs.
$ sudo cat /sys/kernel/debug/gpio|grep PBB.00
gpio-324 (PBB.00 )
Please use 324 for PBB.00 instead.