Why Orin Nano supports the speed up to 20 Gbits/s if the CSI PHY is D-PHY 2.1 and it has 8 lane?

Hello Nvidia Teams,

I would like to ask about supported speed via CSI interface in Jetson Orin Nano Module. In the datasheet, it is stated D-PHY 2.1 is used. As far as I know, D-PHY v2.1 supports 4.5 GB for standard channel for each lane.
Also it is stated 8 lane is supported. So from my perspective supported speed should be up to 36 Gbps (8x4.5) instead of 20 Gbps.
I would be happy if you can help me to understand the speed concept.

Thank you

Current design don’t support 8 lanes mode. And DPHY max speed current support to 2.5G

40 Gbps
(2.5 Gbps/lane * 4 lanes/brick *
4 Bricks)

Hello,
Thank you for your reply.

Currently I have Orin Nano Datasheet v1.2 and Orin NX Datasheet v1.1 . In these datasheets it is stated that “MIPI D-PHY supports up to 2.5 Gbits/sec per pair, for an aggregate bandwidth of 20 Gbps from eight pairs”.

Where can I find current design dataheets and pinout for 4 lanes/brick *
4 Bricks CSI support for the modules current design?

Thank you

Check the design guide from the download center.

Thanks

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