Wk2114 driver error

Hi,
I use Jetson Nano [developer kit version] eMMC module,BSP version:R32.7.4.


My device tree configuration is as follows:
uartb {
compatible = “wkmic,wk2114_uart”;
pinctrl-names = “default”;
reg =<0>;
spi-max-frequency =<10000000>;
reset-gpio=<&gpio TEGRA_GPIO(G, 2) GPIO_ACTIVE_HIGH>;
irq-gpio=<&gpio TEGRA_GPIO(J, 7) IRQ_TYPE_LEVEL_LOW>;
status = “okay”;
};
The following error occurred recently when adding the wk2114_uart driver to the device tree using Jetson Nano [developer kit version]:
[ 345.279079] wk2xxx_uart: loading out-of-tree module taints kernel.
[ 345.288556] wk2xxx_init: UART driver for UART to serial chip WK2114, etc.
[ 345.295615] wk2xxx_init: V2.4 On 2022.09.24
[ 345.300704] wk2xxx_probe!!–devm_kzalloc–
[ 345.305063] wk2xxx_probe!!–dev_set_drvdata–
[ 345.309582] wk2xxx_probe!!–platform_get_resource ok–
[ 345.314827] wk2xxxuart 3.uartb: invalid resource
[ 345.319496] wk2xxx_probe!!–devm_ioremap_resource ok–, base: 00000000fe0311d9
[ 345.327231] wk2xxxuart: probe of 3.uartb failed with error -22
[ 347.404676] configfs-gadget gadget: Wrong NDP SIGN

I’m not sure if it’s right to use uartb or if I should switch to spi, but I’m not sure how much to use spi either

I also try this:
spi@70410000 {
status = “okay”;
spi_wk2114@0 {
compatible = “wkmic,wk2114_uart”;
pinctrl-names = “default”;
reg =<0>;
spi-max-frequency =<10000000>;
reset-gpio=<&gpio TEGRA_GPIO(G, 2) GPIO_ACTIVE_HIGH>;//add xu
irq-gpio=<&gpio TEGRA_GPIO(J, 7) IRQ_TYPE_LEVEL_LOW>;//add xu
status = “okay”;
};
};

it also have error:
[ 2.946873] aer 0000:00:02.0:pcie002: service driver aer loaded
[ 11.898289] ------------[ cut here ]------------
[ 11.898321] WARNING: CPU: 1 PID: 1 at …/drivers/spi/spi-tegra210-qspi.c:1717 tegra_qspi_transfer_one_message+0x130/0x518
[ 11.898325] Modules linked in:

[ 11.898342] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.9.337-tegra #11
[ 11.898347] Hardware name: NVIDIA Jetson Nano Developer Kit (DT)
[ 11.898352] task: (ptrval) task.stack: (ptrval)
[ 11.898357] PC is at tegra_qspi_transfer_one_message+0x130/0x518
[ 11.898361] LR is at tegra_qspi_transfer_one_message+0x12c/0x518
[ 11.898367] pc : [] lr : [] pstate: 40400045
[ 11.898370] sp : ffffffc0fa6fb590
[ 11.898373] x29: ffffffc0fa6fb590 x28: ffffff8009855870
[ 11.898382] x27: ffffff8009699e20 x26: ffffffc0f7b3f000
[ 11.898390] x25: ffffffc0f7b3eee8 x24: ffffffc0f7b3e800
[ 11.898397] x23: ffffffc0f7b3ee20 x22: 0000000000000000
[ 11.898404] x21: ffffffc0f7b3edf0 x20: ffffffc0fa6fb820
[ 11.898411] x19: ffffffc0fa6fb758 x18: 0000000000000001
[ 11.898418] x17: 0000000000000005 x16: 0000000000000000
[ 11.898424] x15: 0000000000000000 x14: ffffff8008fa9ae8
[ 11.898430] x13: 0000000000000000 x12: 00000000000001fc
[ 11.898437] x11: ffffff8008fa9ac0 x10: 0000000000000a40
[ 11.898444] x9 : ffffffc0fa6fb3a0 x8 : ffffffc0fa6f0aa0
[ 11.898451] x7 : 0000000000000400 x6 : 0000000015a3f92b
[ 11.898457] x5 : 0000000000000400 x4 : 0000000000000000
[ 11.898464] x3 : dead000000000100 x2 : dead000000000200
[ 11.898470] x1 : ffffffc0fa6f0000 x0 : 0000000000000000

[ 11.898494] —[ end trace dafe6859e71ad01e ]—
[ 11.898498] Call trace:
[ 11.898505] [< (ptrval)>] tegra_qspi_transfer_one_message+0x130/0x518
[ 11.898516] [< (ptrval)>] __spi_pump_messages+0x320/0x6d8
[ 11.898524] [< (ptrval)>] __spi_sync+0x280/0x2b0
[ 11.898531] [< (ptrval)>] spi_sync+0x34/0x58
[ 11.898538] [< (ptrval)>] spi_write_then_read+0x104/0x1d0
[ 11.898544] [< (ptrval)>] qspi_probe+0xa4/0x520
[ 11.898551] [< (ptrval)>] spi_drv_probe+0x80/0xd0
[ 11.898563] [< (ptrval)>] driver_probe_device+0x298/0x448
[ 11.898570] [< (ptrval)>] __device_attach_driver+0xa8/0x158
[ 11.898576] [< (ptrval)>] bus_for_each_drv+0x58/0xa8
[ 11.898581] [< (ptrval)>] __device_attach+0xc8/0x158
[ 11.898587] [< (ptrval)>] device_initial_probe+0x24/0x30
[ 11.898592] [< (ptrval)>] bus_probe_device+0x9c/0xa8
[ 11.898597] [< (ptrval)>] device_add+0x3d0/0x5d8
[ 11.898603] [< (ptrval)>] spi_add_device+0x11c/0x1a8
[ 11.898609] [< (ptrval)>] of_register_spi_device+0x230/0x350
[ 11.898615] [< (ptrval)>] spi_register_master+0x298/0x540
[ 11.898620] [< (ptrval)>] devm_spi_register_master+0x4c/0xa0
[ 11.898625] [< (ptrval)>] tegra_qspi_probe+0x4f0/0x780
[ 11.898630] [< (ptrval)>] platform_drv_probe+0x60/0xc0
[ 11.898636] [< (ptrval)>] driver_probe_device+0x298/0x448
[ 11.898641] [< (ptrval)>] __driver_attach+0x110/0x138
[ 11.898646] [< (ptrval)>] bus_for_each_dev+0x5c/0xa8
[ 11.898651] [< (ptrval)>] driver_attach+0x30/0x40
[ 11.898655] [< (ptrval)>] bus_add_driver+0x20c/0x2a8
[ 11.898661] [< (ptrval)>] driver_register+0x6c/0x110
[ 11.898665] [< (ptrval)>] __platform_driver_register+0x5c/0x68
[ 11.898677] [< (ptrval)>] tegra_qspi_driver_init+0x18/0x20
[ 11.898688] [< (ptrval)>] do_one_initcall+0x44/0x130
[ 11.898698] [< (ptrval)>] kernel_init_freeable+0x1b4/0x258
[ 11.898709] [< (ptrval)>] kernel_init+0x18/0x108
[ 11.898714] [< (ptrval)>] ret_from_fork+0x10/0x30
[ 11.898721] tegra-qspi 70410000.spi: QSPI Transfer failed with timeout
[ 11.905330] tegra-qspi 70410000.spi: QSPI non-combined sequence transfer failed: -5
[ 11.913020] spi_master spi32766: failed to transfer one message from queue
[ 11.919925] qspi_mtd: probe of spi32766.0 failed with error -5
[ 11.919964] tegra-qspi 70410000.spi: chipselect 0 already in use
[ 11.925980] spi_master spi32766: spi_device register error /spi@70410000/spi_wk2114@0
[ 11.933817] spi_master spi32766: Failed to create SPI device for /spi@70410000/spi_wk2114@0
[ 11.936751] tun: Universal TUN/TAP device driver, 1.6
[ 11.936759] tun: (C) 1999-2004 Max Krasnyansky maxk@qualcomm.com
[ 11.937901] e1000e: Intel(R) PRO/1000 Network Driver - 3.2.6-k
[ 11.937905] e1000e: Copyright(c) 1999 - 2015 Intel Corporation.
[ 11.937971] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.4.0-k
[ 11.937974] igb: Copyright (c) 2007-2014 Intel Corporation.

When I tree the device like this, ttyTHS1 in the /dev/directory, and nano lost the debug serial port,the error is as follows:
uartb: serial@70006040 {
compatible = “wkmic,wk2114_uart”;
pinctrl-names = “default”;
reg =<0>;
spi-max-frequency =<10000000>;
reset-gpio=<&gpio TEGRA_GPIO(G, 2) GPIO_ACTIVE_HIGH>;//add xu
irq-gpio=<&gpio TEGRA_GPIO(J, 7) IRQ_TYPE_LEVEL_LOW>;//add xu
status = “okay”;
};

[ 3.996001] using random self ethernet address
[ 4.011057] using random host ethernet address
[ 4.079233] wk2xxx_init: UART driver for UART to serial chip WK2114, etc.
[ 4.107133] wk2xxx_init: V2.4 On 2022.09.24
[ 4.122373] wk2xxxuart 3.serial: invalid resource
[ 4.128260] wk2xxxuart: probe of 3.serial failed with error -22
[ 4.642276] Mass Storage Function, version: 2009/09/11
[ 4.642282] LUN: removable file: (no medium)
[ 4.649199] using random self ethernet address
[ 4.661162] using random host ethernet address
[ 4.682779] random: crng init done
[ 4.686186] random: 241 urandom warning(s) missed due to ratelimiting
[ 4.784611] rndis0: HOST MAC 56:a0:55:00:28:a0

Hi study_x,

Do you get the porting guide/driver from your vendor for this WK2114 module?

Please share the full dmesg and device tree for further check.

yes,I have get guide/driver:
WK系列 UART拓展4串口驱动移植参考文档-V2.4.pdf (1.5 MB)

It seems a UART expander module to let you get more UART interfaces.

From the guide, the reset-gpio and irq-gpio should be configured.

reset-gpio=<&gpio TEGRA_GPIO(G, 2) GPIO_ACTIVE_HIGH>;
irq-gpio=<&gpio TEGRA_GPIO(J, 7) IRQ_TYPE_LEVEL_LOW>

Do you want to use PG.02 and PJ.07 for them respectively?
If so, ave you configured them as gpio in pinmux spreadsheet before use?
gpio79(PJ.07) is pinmux with I2S4B_SCLK.
gpio50(PG.02) is pinmux with UART2_RTS.

[    4.122373] wk2xxxuart 3.serial: invalid resource
[    4.128260] wk2xxxuart: probe of 3.serial failed with error -22

From your log, it is failed in probe function. Please check the wk2xxxuart driver what causes the failed.

Please also share the full device tree file for further check.

Now the device tree is normal, but the driver still reports an error, check the driver, may be the serial port register error, how do I get a list of serial port registers similar to the following:
/////////////////////////////////////////
/RK3399 uart offset*/

define UART1RK_RX 0x00
define UART1RK_TX 0x00
define UART1RK_DLL 0x00
define UART1RK_DLH 0x04
define UART1RK_IER 0x04
define UART1RK_IIR 0x08
define UART1RK_FCR 0x08
define UART1RK_LCR 0x0C
define UART1RK_MCR 0x10
define UART1RK_LSR 0x14
define UART1RK_MSR 0x18
define UART1RK_SCR 0x1C
define UART1RK_SRBR 0x30
define UART1RK_STHR 0x30
define UART1RK_FAR 0x70
define UART1RK_TFR 0x74
define UART1RK_RFW 0x78
define UART1RK_USR 0x7C
define UART1RK_TFL 0x80
define UART1RK_RFL 0x84
define UART1RK_SRR 0x88
define UART1RK_SRTS 0x8C
define UART1RK_SBCR 0x90
define UART1RK_SDMAM 0x94
define UART1RK_SFE 0x98
define UART1RK_SRT 0x9C
define UART1RK_STET 0xA0
define UART1RK_HTX 0xA4
define UART1RK_DMASA 0xA8
define UART1RK_CPR 0xF4
define UART1RK_UCV 0xF8
define UART1RK_CTR 0xFC

/***************************/

or like this:
/iMX8 UART register****************************/
/* IMX8 UART Register definitions /
define IMX8_URXD0 0x0 /
Receiver Register /
define IMX8_URTX0 0x40 /
Transmitter Register /
define IMX8_UCR1 0x80 /
Control Register 1 /
define IMX8_UCR2 0x84 /
Control Register 2 /
define IMX8_UCR3 0x88 /
Control Register 3 /
define IMX8_UCR4 0x8c /
Control Register 4 /
define IMX8_UFCR 0x90 /
FIFO Control Register /
define IMX8_USR1 0x94 /
Status Register 1 /
define IMX8_USR2 0x98 /
Status Register 2 /
define IMX8_UESC 0x9c /
Escape Character Register /
define IMX8_UTIM 0xa0 /
Escape Timer Register /
define IMX8_UBIR 0xa4 /
BRM Incremental Register /
define IMX8_UBMR 0xa8 /
BRM Modulator Register /
define IMX8_UBRC 0xac /
Baud Rate Count Register /
define IMX8_UMCR 0xb8 /
/
define IMX8_IMX21_ONEMS 0xb0 /
One Millisecond register /
define IMX8_IMX1_UTS 0xd0 /
UART Test Register on i.mx1 /
define IMX8_IMX21_UTS 0xb4 /
UART Test Register on all other i.mx*/

Okay, you sample code seems for I.MX8 platform.
Please refer to serial-tegra.c for our UART driver.

Please still share the device tree for us to confirm that you put the configuration at the correct place.

I have already referred to serial-tegra.c, but there are still a few register offsets I do not know, listed as follows:(Is there a hardware manual for reference regarding uart_2?)
define UART1RK_USR 0x7C // UART Status Register
define UART1RK_SRR -6

The following are guesses available:
define UART1RK_RX 0x00
define UART1RK_TX 0x00

define UART1RK_DLL 0x00
define UART1RK_DLH 0x01

define UART1RK_IER 0x01
define UART1RK_IIR 0x02
define UART1RK_FCR 0x02
define UART1RK_LCR 0x03
define UART1RK_MCR 0x04
define UART1RK_LSR 0x05
define UART1RK_MSR 0x06
define UART1RK_SCR 0x07

define UART1RK_CTR 0xFF

You may not know every register as your sample code.
Please just compare the UART driver from I.MX platform and our L4T(serial-tegra.c) to know how it read/write data.

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