Hi,
I have a test-pattern generation FPGA (lattice crosslink) connected to the Xavier’s CSI2&CSI3 (4-lane). Driver and Device Tree (using Main Platform Device Tree File method in nvl4t_docs) are basically working, but I can’t get images.
When streaming started, the FPGA would generate some waves monitored by oscilloscope (at least LP signals were correct as the oscilloscope was not good enough to see the HS signals).
The test pattern is 1280x720, RGB888 format.
I used “v4lctl -c /dev/video0 snap raw 1280x720 ~/test.raw” and got this dmesg (some dynamic debug outputs were enabled):
[ 2284.253641] crosslink 2-0037: crosslink_power_on: power on
[ 2284.253653] t194-nvcsi 15a00000.nvcsi: csi5_power_on
[ 2284.253843] tegra_mipi_cal 3990000.mipical: tegra_mipi_bias_pad_enable
[ 2284.255139] t194-nvcsi 15a00000.nvcsi: csi5_mipi_cal
[ 2284.255146] t194-nvcsi 15a00000.nvcsi: csi port:2
[ 2284.349692] tegra194-vi5 15c10000.vi: vi_channel_power_on_vi_device
[ 2284.349713] tegra194-vi5 15c10000.vi: vi_capture_init++
[ 2284.350090] tegra194-vi5 15c10000.vi: chan flags 4163
[ 2284.350102] tegra194-vi5 15c10000.vi: chan mask ffffffffffffffff
[ 2284.350108] tegra194-vi5 15c10000.vi: queue depth 1
[ 2284.350113] tegra194-vi5 15c10000.vi: request size 704
[ 2284.353475] tegra194-vi5 15c10000.vi: 6 GoS tables configured.
[ 2284.353488] tegra194-vi5 15c10000.vi: gos[0] = 0xeca00000
[ 2284.353494] tegra194-vi5 15c10000.vi: gos[1] = 0xeca01000
[ 2284.353498] tegra194-vi5 15c10000.vi: gos[2] = 0xeca02000
[ 2284.353501] tegra194-vi5 15c10000.vi: gos[3] = 0xeca03000
[ 2284.353504] tegra194-vi5 15c10000.vi: gos[4] = 0xeca04000
[ 2284.353507] tegra194-vi5 15c10000.vi: gos[5] = 0xeca05000
[ 2284.353518] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: sending chan_id 66 msg_id 16
[ 2284.354333] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: response chan_id 66 msg_id 17
[ 2284.354627] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:0
[ 2284.354750] tegra194-vi5 15c10000.vi: vi_capture_status: waiting for status, timeout:2500 ms
[ 2284.356610] misc tegra_camera_ctrl: tegra_camera_update_isobw:Set iso bw 488281 kbyteps at 7630 KHz
[ 2284.356657] misc tegra_camera_ctrl: tegra_camera_isomgr_request++ bw=488281, lt=0
[ 2284.362862] misc tegra_camera_ctrl: tegra_camera_isomgr_request: tegra_camera isomgr latency is 10 usec
[ 2284.362877] t194-nvcsi 15a00000.nvcsi: csi5_start_streaming: stream 2, pg_mode=0x0
[ 2284.362914] t194-nvcsi 15a00000.nvcsi: csi5_stream_set_config: stream_id=2
[ 2284.362923] t194-nvcsi 15a00000.nvcsi: cil_settingtime is pulled from device
[ 2284.362935] t194-nvcsi 15a00000.nvcsi: csi5_stream_open: stream_id=2
[ 2284.362950] crosslink 2-0037: crosslink_s_stream++
[ 2284.363156] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback for id 65
[ 2284.363167] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback for id 65
[ 2284.371290] crosslink 2-0037: crosslink_s_stream--
[ 2284.379370] [RCE] vi5_hwinit: firmware CL2018061801 protocol version 2.2
[ 2286.947160] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 2286.947355] tegra194-vi5 15c10000.vi: vi capture dequeue status failed
[ 2286.947496] video4linux video0: free_ring_buffers: capture init latency is 2598 ms
[ 2287.022523] crosslink 2-0037: crosslink_s_stream++
[ 2287.030874] t194-nvcsi 15a00000.nvcsi: csi5_stop_streaming: stream 2, pg_mode=0x0
[ 2287.030887] t194-nvcsi 15a00000.nvcsi: csi5_stream_close: stream_id=2
[ 2287.031098] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback for id 65
[ 2287.032608] misc tegra_camera_ctrl: tegra_camera_update_isobw:Set iso bw 0 kbyteps at 0 KHz
[ 2287.032619] misc tegra_camera_ctrl: tegra_camera_isomgr_request++ bw=0, lt=0
[ 2287.038580] misc tegra_camera_ctrl: tegra_camera_isomgr_request: tegra_camera isomgr latency is 10 usec
[ 2287.038633] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: sending chan_id 0 msg_id 20
[ 2287.038857] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: response chan_id 0 msg_id 21
[ 2287.038952] tegra194-vi5 15c10000.vi: vi_capture_shutdown--
[ 2287.038961] tegra194-vi5 15c10000.vi: vi_channel_power_off_vi_device
[ 2287.056782] crosslink 2-0037: crosslink_power_off: power off
[ 2287.056883] t194-nvcsi 15a00000.nvcsi: csi5_power_off
[ 2293.090934] tegra_mipi_cal 3990000.mipical: tegra_mipi_bias_pad_disable
Also tried " v4l2-ctl -d /dev/video0 --set-fmt-video=width=1280,height=720,pixelformat=AR24 --set-ctrl bypass_mode=0 --stream-mmap --stream-count=1 --stream-to=test.raw" and got:
[ 3332.403600] crosslink 2-0037: crosslink_power_on: power on
[ 3332.403620] t194-nvcsi 15a00000.nvcsi: csi5_power_on
[ 3332.403804] tegra_mipi_cal 3990000.mipical: tegra_mipi_bias_pad_enable
[ 3332.405013] t194-nvcsi 15a00000.nvcsi: csi5_mipi_cal
[ 3332.405020] t194-nvcsi 15a00000.nvcsi: csi port:2
[ 3332.416227] tegra194-vi5 15c10000.vi: vi_channel_power_on_vi_device
[ 3332.416250] tegra194-vi5 15c10000.vi: vi_capture_init++
[ 3332.416559] tegra194-vi5 15c10000.vi: chan flags 4163
[ 3332.416570] tegra194-vi5 15c10000.vi: chan mask ffffffffffffffff
[ 3332.416578] tegra194-vi5 15c10000.vi: queue depth 4
[ 3332.416582] tegra194-vi5 15c10000.vi: request size 704
[ 3332.419876] tegra194-vi5 15c10000.vi: 6 GoS tables configured.
[ 3332.419891] tegra194-vi5 15c10000.vi: gos[0] = 0xeca00000
[ 3332.419896] tegra194-vi5 15c10000.vi: gos[1] = 0xeca01000
[ 3332.419900] tegra194-vi5 15c10000.vi: gos[2] = 0xeca02000
[ 3332.419903] tegra194-vi5 15c10000.vi: gos[3] = 0xeca03000
[ 3332.419906] tegra194-vi5 15c10000.vi: gos[4] = 0xeca04000
[ 3332.419909] tegra194-vi5 15c10000.vi: gos[5] = 0xeca05000
[ 3332.419917] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: sending chan_id 67 msg_id 16
[ 3332.427008] tegra194-vi5 15c10000.vi: vi_capture_ivc_send_control: response chan_id 67 msg_id 17
[ 3332.427296] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:0
[ 3332.427317] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:1
[ 3332.427324] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:2
[ 3332.427333] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:3
[ 3332.427447] tegra194-vi5 15c10000.vi: vi_capture_status: waiting for status, timeout:2500 ms
[ 3332.428998] misc tegra_camera_ctrl: tegra_camera_update_isobw:Set iso bw 488281 kbyteps at 7630 KHz
[ 3332.429009] misc tegra_camera_ctrl: tegra_camera_isomgr_request++ bw=488281, lt=0
[ 3332.435646] misc tegra_camera_ctrl: tegra_camera_isomgr_request: tegra_camera isomgr latency is 10 usec
[ 3332.435688] t194-nvcsi 15a00000.nvcsi: csi5_start_streaming: stream 2, pg_mode=0x0
[ 3332.435694] t194-nvcsi 15a00000.nvcsi: csi5_stream_set_config: stream_id=2
[ 3332.435705] t194-nvcsi 15a00000.nvcsi: cil_settingtime is pulled from device
[ 3332.435718] t194-nvcsi 15a00000.nvcsi: csi5_stream_open: stream_id=2
[ 3332.435733] crosslink 2-0037: crosslink_s_stream++
[ 3332.435910] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback for id 65
[ 3332.435921] tegra-capture-ivc ivc-bc00000.rtcpu:ivccontrol@3: No callback for id 65
[ 3332.443985] crosslink 2-0037: crosslink_s_stream--
[ 3332.454940] [RCE] vi5_hwinit: firmware CL2018061801 protocol version 2.2
[ 3334.974893] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3334.975096] tegra194-vi5 15c10000.vi: vi capture dequeue status failed
[ 3334.975265] video4linux video0: free_ring_buffers: capture init latency is 2559 ms
[ 3334.975288] tegra194-vi5 15c10000.vi: vi_capture_status: waiting for status, timeout:2500 ms
[ 3334.975364] tegra194-vi5 15c10000.vi: channel error, resetting the channel
[ 3334.975508] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:0
[ 3337.534778] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3337.534926] tegra194-vi5 15c10000.vi: vi capture dequeue status failed
[ 3337.535058] tegra194-vi5 15c10000.vi: vi_capture_status: waiting for status, timeout:2500 ms
[ 3337.535216] tegra194-vi5 15c10000.vi: channel error, resetting the channel
[ 3337.535439] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:0
[ 3340.094726] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3340.094882] tegra194-vi5 15c10000.vi: vi capture dequeue status failed
[ 3340.095056] tegra194-vi5 15c10000.vi: vi_capture_status: waiting for status, timeout:2500 ms
[ 3340.095115] tegra194-vi5 15c10000.vi: channel error, resetting the channel
[ 3340.095290] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:0
[ 3342.654670] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3342.654830] tegra194-vi5 15c10000.vi: vi capture dequeue status failed
[ 3342.655003] tegra194-vi5 15c10000.vi: vi_capture_status: waiting for status, timeout:2500 ms
[ 3342.655100] tegra194-vi5 15c10000.vi: channel error, resetting the channel
[ 3342.655280] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:0
[ 3345.214586] tegra194-vi5 15c10000.vi: no reply from camera processor
[ 3345.214742] tegra194-vi5 15c10000.vi: vi capture dequeue status failed
[ 3345.214963] tegra194-vi5 15c10000.vi: channel error, resetting the channel
[ 3345.214982] ------------[ cut here ]------------
[ 3345.215004] WARNING: CPU: 3 PID: 10759 at /home/aibee/jetpack/sources/kernel/kernel/kernel-4.9/drivers/media/v4l2-core/videobuf2-core.c:899 vb2_buffer_done+0x1f0/0x230
[ 3345.215022] Modules linked in: bnep fuse nvs_bmi160 nvs bluedroid_pm ip_tables x_tables
[ 3345.215039] CPU: 3 PID: 10759 Comm: vi-output, cros Not tainted 4.9.108 #6
[ 3345.215041] Hardware name: jetson-xavier (DT)
[ 3345.215045] task: ffffffc3af55d400 task.stack: ffffffc372ccc000
[ 3345.215049] PC is at vb2_buffer_done+0x1f0/0x230
[ 3345.215054] LR is at free_ring_buffers+0x6c/0x140
[ 3345.215057] pc : [<ffffff8008b55f78>] lr : [<ffffff8008b606fc>] pstate: 20c00045
[ 3345.215058] sp : ffffffc372ccfd00
[ 3345.215062] x29: ffffffc372ccfd00 x28: 0000000000000000
[ 3345.215065] x27: 0000000000000000 x26: ffffffc3e99e7eb8
[ 3345.215069] x25: ffffff800be9b000 x24: 431bde82d7b634db
[ 3345.215072] x23: 0000000000000007 x22: ffffffc3e99e7b48
[ 3345.215075] x21: ffffffc3b1344c00 x20: ffffffc3b1344c00
[ 3345.215078] x19: ffffffc3e99e7018 x18: 000000000000149a
[ 3345.215081] x17: 000000000000c145 x16: 0000000000000000
[ 3345.215084] x15: 000000000000002a x14: 0000000000000916
[ 3345.215087] x13: 0000000000000000 x12: 0000000000006d12
[ 3345.215090] x11: 0000000000e537d4 x10: 0000000000000000
[ 3345.215095] x9 : 0000000000000400 x8 : 000000000000091b
[ 3345.215099] x7 : 0000000000000000 x6 : 0000000000000000
[ 3345.215140] x5 : 0000000000000004 x4 : 0000000000000007
[ 3345.215143] x3 : 0000000000000001 x2 : ffffffc3960ee598
[ 3345.215146] x1 : 0000000000000007 x0 : 0000000000000007
[ 3345.215148] ---[ end trace 3535d97620aadcac ]---
[ 3345.215150] Call trace:
[ 3345.215156] [<ffffff8008b55f78>] vb2_buffer_done+0x1f0/0x230
[ 3345.215160] [<ffffff8008b606fc>] free_ring_buffers+0x6c/0x140
[ 3345.215166] [<ffffff8008b6a2e4>] tegra_channel_kthread_capture_dequeue+0xa4/0x370
[ 3345.215173] [<ffffff80080dabd8>] kthread+0xe8/0x100
[ 3345.215179] [<ffffff8008083500>] ret_from_fork+0x10/0x50
[ 3345.215189] tegra194-vi5 15c10000.vi: vi_capture_status: waiting for status, timeout:2500 ms
[ 3345.215536] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:0
[ 3345.215604] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:1
[ 3345.215616] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:2
[ 3345.215623] tegra194-vi5 15c10000.vi: vi_capture_request: sending chan_id 0 msg_id 1 buf:3
Related DT is attached:
/ {
host1x {
vi@15c10000 {
num-channels = <1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3344_vi_in0: endpoint {
port-index = <2>;
bus-width = <4>;
remote-endpoint = <&e3344_csi_out0>;
};
};
};
};
nvcsi@15a00000 {
num-channels = <1>;
#address-cells = <1>;
#size-cells = <0>;
channel@0 {
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3344_csi_in0: endpoint@0 {
port-index = <2>;
bus-width = <4>;
remote-endpoint = <&e3344_crosslink_out0>;
};
};
port@1 {
reg = <1>;
e3344_csi_out0: endpoint@1 {
remote-endpoint = <&e3344_vi_in0>;
};
};
};
};
};
};
i2c@3180000 {
crosslink_c@37 {
compatible = "nvidia,crosslink";
/* I2C device address */
reg = <0x37>;
/* V4L2 device node location */
devnode = "video0";
/* Physical dimensions of sensor */
physical_w = "3.674";
physical_h = "2.738";
/* Define any required hw resources needed by driver */
/* ie. clocks, io pins, power sources */
avdd-reg = "vana";
iovdd-reg = "vif";
/* Sensor output flip settings */
vertical-flip = "true";
/**
* A modeX node is required to support v4l2 driver
* implementation with NVIDIA camera software stack
*
* mclk_khz = "";
* Standard MIPI driving clock, typically 24MHz
*
* num_lanes = "";
* Number of lane channels sensor is programmed to output
*
* tegra_sinterface = "";
* The base tegra serial interface lanes are connected to
*
* discontinuous_clk = "";
* The sensor is programmed to use a discontinuous clock on MIPI lanes
*
* dpcm_enable = "true";
* The sensor is programmed to use a DPCM modes
*
* cil_settletime = "";
* MIPI lane settle time value.
* A "0" value attempts to autocalibrate based on mclk_multiplier
*
*
*
*
* active_w = "";
* Pixel active region width
*
* active_h = "";
* Pixel active region height
*
* pixel_t = "";
* The sensor readout pixel pattern
*
* readout_orientation = "0";
* Based on camera module orientation.
* Only change readout_orientation if you specifically
* Program a different readout order for this mode
*
* line_length = "";
* Pixel line length (width) for sensor mode.
* This is used to calibrate features in our camera stack.
*
* mclk_multiplier = "";
* Multiplier to MCLK to help time hardware capture sequence
* TODO: Assign to PLL_Multiplier as well until fixed in core
*
* pix_clk_hz = "";
* Sensor pixel clock used for calculations like exposure and framerate
*
*
*
*
* inherent_gain = "";
* Gain obtained inherently from mode (ie. pixel binning)
*
* min_gain_val = ""; (floor to 6 decimal places)
* max_gain_val = ""; (floor to 6 decimal places)
* Gain limits for mode
*
* min_exp_time = ""; (ceil to integer)
* max_exp_time = ""; (ceil to integer)
* Exposure Time limits for mode (us)
*
*
* min_hdr_ratio = "";
* max_hdr_ratio = "";
* HDR Ratio limits for mode
*
* min_framerate = "";
* max_framerate = "";
* Framerate limits for mode (fps)
*/
mode0 { // CROSSLINK_MODE_2592X1944
mclk_khz = "24000";
num_lanes = "4";
tegra_sinterface = "serial_c";
phy_mode = "DPHY";
discontinuous_clk = "no";
dpcm_enable = "false";
cil_settletime = "20";
active_w = "1280";
active_h = "720";
pixel_t = "rgb888";
readout_orientation = "0";
line_length = "1280";
inherent_gain = "1";
mclk_multiplier = "6.67";
pix_clk_hz = "125000000";
min_gain_val = "1.0";
max_gain_val = "16";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
min_framerate = "1.816577";
max_framerate = "30";
min_exp_time = "34";
max_exp_time = "550385";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3344_crosslink_out0: endpoint {
port-index = <2>;
bus-width = <4>;
remote-endpoint = <&e3344_csi_in0>;
};
};
};
};
};
e3344_lens_crosslink@P5V27C {
min_focus_distance = "0.0";
hyper_focal = "0.0";
focal_length = "2.67";
f_number = "2.0";
aperture = "2.0";
};
tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
/**
* Physical settings to calculate max ISO BW
*
* num_csi_lanes = <>;
* Total number of CSI lanes when all cameras are active
*
* max_lane_speed = <>;
* Max lane speed in Kbit/s
*
* min_bits_per_pixel = <>;
* Min bits per pixel
*
* vi_peak_byte_per_pixel = <>;
* Max byte per pixel for the VI ISO case
*
* vi_bw_margin_pct = <>;
* Vi bandwidth margin in percentage
*
* max_pixel_rate = <>;
* Max pixel rate in Kpixel/s for the ISP ISO case
* Set this to the highest pix_clk_hz out of all available modes.
*
* isp_peak_byte_per_pixel = <>;
* Max byte per pixel for the ISP ISO case
*
* isp_bw_margin_pct = <>;
* Isp bandwidth margin in percentage
*/
num_csi_lanes = <4>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <24>;
vi_peak_byte_per_pixel = <3>;
vi_bw_margin_pct = <25>;
max_pixel_rate = <160000>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
/**
* The general guideline for naming badge_info contains 3 parts, and is as follows,
* The first part is the camera_board_id for the module; if the module is in a FFD
* platform, then use the platform name for this part.
* The second part contains the position of the module, ex. “rear” or “front”.
* The third part contains the last 6 characters of a part number which is found
* in the module's specsheet from the vender.
*/
modules {
module0 {
badge = "e3344_front_P5V27C";
position = "rear";
orientation = "1";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "crosslink 2-0037";
proc-device-tree = "/proc/device-tree/i2c@3180000/crosslink_c@37";
};
drivernode1 {
pcl_id = "v4l2_lens";
proc-device-tree = "/proc/device-tree/e3344_lens_crosslink@P5V27C/";
};
};
};
};
};
Seems that the kernel code will not automatically calculated the cil_settletime when it’s 0, so 20 is set here. Am I right?
media-ctl -p
Media controller API version 0.1.0
Media device information
------------------------
driver tegra194-vi5
model NVIDIA Tegra Video Input Device
serial
bus info
hw revision 0x3
driver version 0.0.0
Device topology
- entity 1: crosslink 2-0037 (1 pad, 1 link)
type V4L2 subdev subtype Sensor flags 0
device node name /dev/v4l-subdev0
pad0: Source
[fmt:RGB888_1X24/1280x720 field:none colorspace:srgb]
-> "15a00000.nvcsi--1":0 [ENABLED]
- entity 3: 15a00000.nvcsi--1 (2 pads, 2 links)
type V4L2 subdev subtype Unknown flags 0
device node name /dev/v4l-subdev1
pad0: Sink
<- "crosslink 2-0037":0 [ENABLED]
pad1: Source
-> "vi-output, crosslink 2-0037":0 [ENABLED]
- entity 6: vi-output, crosslink 2-0037 (1 pad, 1 link)
type Node subtype V4L flags 0
device node name /dev/video0
pad0: Sink
<- "15a00000.nvcsi--1":1 [ENABLED]
Is “nvcsi–1” correct here? According to dmesg’s “t194-nvcsi 15a00000.nvcsi: csi5_stream_open: stream_id=2”, it seems that the csi port is correct (port_index = 2).
Any hints to solve this problem? Thanks.