Agx xavier pcie c0, as endpoint mode, UPHY init failed

Robotics & Edge Computing Jetson & Embedded Systems Jetson AGX Xavier
,
1

Hi,
Our carrier board want to use pcie x4 (c0) as endpoint mode , and we change tegra194-p2888-0000-a00.dtsi file just like:
+ pcie_ep@14180000 {
+ status = “okay”;
+ vddio-pex-ctl-supply = <&p2888_spmic_sd3>;
+ nvidia,disable-aspm-states = <0xf>;
+
+ phys = <&p2u_2>,
+ <&p2u_3>,
+ <&p2u_4>,
+ <&p2u_5>;
+ phy-names = “pcie-p2u-0”, “pcie-p2u-1”, “pcie-p2u-2”, “pcie-p2u-3”;
+
+ };

and we call pex_ep_event_pex_rst_deassert func directory in func tegra_pcie_dw_ep_probe:

— a/drivers/pci/ep/pcie-tegra-dw-ep.c
+++ b/drivers/pci/ep/pcie-tegra-dw-ep.c
@@-2725,7 +2725,7 @@ static int tegra_pcie_dw_ep_probe(struct platform_device *pdev)
dev_err(pcie->dev, “%s failed to create char\n”, MODULENAME);
goto fail_create_char_device;
}

-
+ pex_ep_event_pex_rst_deassert(pcie);
return ret;
fail_create_char_device:

it seem bpmp not work.the error log is:
dji@xavier[1]:~$ dmesg | grep pci
[ 0.985086] iommu: Adding device 14180000.pcie_ep to group 0
[ 0.986106] iommu: Adding device 141a0000.pcie_ep to group 1
[ 1.612239] pcie->cid = 0
[ 1.612871] tegra-pcie-dw-ep 14180000.pcie_ep: alloc_single_page_bar0_mem: iommu_map(RAM) alloc page dma_buf: 0x46ab8c000
[ 1.613367] tegra-pcie-dw-ep 14180000.pcie_ep: alloc_multi_page_bar0_mem: iommu_map(RAM) alloc page dma_buf: 0xd8a00000
[ 1.613837] tegra-pcie-dw-ep 14180000.pcie_ep: BAR0 IOVA: 0xff000000, dma_buf_va: ffffff800d801000, dma_buf_pa: 0xff002000
[ 1.616358] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=457632, buf_to_buf=396960 buf_to_iommu=413408
[ 1.617572] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=386624, buf_to_buf=390080 buf_to_iommu=402656
[ 1.618713] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=364192, buf_to_buf=390208 buf_to_iommu=358848
[ 1.619901] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=347840, buf_to_buf=408864 buf_to_iommu=349280
[ 1.620954] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=359968, buf_to_buf=348096 buf_to_iommu=314208
[ 1.621965] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=330336, buf_to_buf=340800 buf_to_iommu=313408
[ 1.623147] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=372128, buf_to_buf=363680 buf_to_iommu=412768
[ 1.624368] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=421920, buf_to_buf=357376 buf_to_iommu=409152
[ 1.625486] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=368960, buf_to_buf=355872 buf_to_iommu=362208
[ 1.626564] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=362112, buf_to_buf=347968 buf_to_iommu=339456
[ 1.627780] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=356992, buf_to_buf=346432 buf_to_iommu=483552
[ 1.628955] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=352928, buf_to_buf=350624 buf_to_iommu=434976
[ 1.630045] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=330144, buf_to_buf=322816 buf_to_iommu=401120
[ 1.631218] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=354080, buf_to_buf=344288 buf_to_iommu=434848
[ 1.632552] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=445952, buf_to_buf=401664 buf_to_iommu=449984
[ 1.633781] tegra-pcie-dw-ep 14180000.pcie_ep: length=2097152 iommu_to_buf=392352, buf_to_buf=353760 buf_to_iommu=449216
[ 1.635686] tegra-pcie-dw-ep 14180000.pcie_ep: UPHY init failed for PCIe EP:-116
[ 1.905152] ehci-pci: EHCI PCI platform driver

can you show some way how to us pcie c0 as endpoint mode. thank you;

3

Sorry for the late response, have this issue been resolved or still need support?

4

hi kayccc,thanks for response, The problem is still bothering us and need support. we haved try for add rst gpio, and triger by rc .it still not working, the error print is same as befor.
The dts modification is as follows
@@kernel/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0000-a00.dtsi
+ pcie_ep@14180000 {
+ status = “okay”;
+ vddio-pex-ctl-supply = <&p2888_spmic_sd3>;
+ nvidia,disable-aspm-states = <0xf>;
+
+ phys = <&p2u_2>,
+ <&p2u_3>,
+ <&p2u_4>,
+ <&p2u_5>;
+ phy-names = “pcie-p2u-0”, “pcie-p2u-1”, “pcie-p2u-2”, “pcie-p2u-3”;
+ nvidia,pex-rst-gpio = <&tegra_main_gpio TEGRA194_MAIN_GPIO(K, 1)
+ GPIO_ACTIVE_LOW>;
+ };

6

The way the endpoint driver is written, we call pex_ep_event_pex_rst_deassert() only after observing a PERST# deassertion and it also implies (implicitly) that the REFCLK is available from the host and hence host is going for PERST# de-assertion. This is confirmed by the PCIe spec also. So, in your case, if you are calling pex_ep_event_pex_rst_deassert() before making sure that the REFCLK is available from the host, then the UPHY initialization is bound to fail as the UPHY gets initialized based on the REFCLK coming into the endpoint mode SoC from the host.
So, please make sure that either
a) pex_ep_event_pex_rst_deassert() is called only after REFCLK is made available or
b) make the calling of pex_ep_event_pex_rst_deassert() automatic after observing the de-assertion of PERST# (this is to make sure that the REFCLK is indeed available)