Can I set RM_SURFACE_ALIGNMENT to 8 or 16 not 256?
I’m trying to connect Sony’s IMX287 to Tx2 board but I have seen some blanked area on captured image.
The resolution is 728x544 and I’ve checked the bytesperline value is 1536(768x2) not 1456(728x2).
It seems that the value is calulated by RM_SURFACE_ALIGNMENT on vi4_fops.c.
Can I change the value to 16?
(I’ve already changed it and tested but I got a corrupted image)
If not possible, How can I crop the image without using CPU resources?
The alignment is not for image corrupted. => I’m sorry but I can’t understand your reply exactly. Did you mean that it is not possible to change alignment value? Doesn’t Tx2 support 1440x1080 input?
I mean you can’t change the RM_SURFACE_ALIGNMENT for cropping image.
And yes the surface alignment can’t be change.
There’s no reason not support 1440x1080. What’s the format? YUV or Bayer sensor?
Output format : MIPI RAW 12bit(monochrome). 728x544.
I only use v4l2-ctl to capture(not using ISP).
I expected that the bytes per line is 1456(7282) but the “Bytes per line” value of /dev/video0 is 1536(7682).
So I checked the TX2’s device driver(channel.c, vi4_fops.c, …) and I found that the device driver changed the value.
<channel.c>
static void tegra_channel_fmt_align(struct tegra_channel *chan,
const struct tegra_video_format *vfmt,
u32 *width, u32 *height, u32 *bytesperline)
{
unsigned int min_bpl;
unsigned int max_bpl;
unsigned int align, fmt_align;
unsigned int temp_bpl;
unsigned int bpl;
unsigned int numerator, denominator;
const struct tegra_frac *bpp = &vfmt->bpp;
…
/* Align stride */ if (chan->vi->fops->vi_stride_align) chan->vi->fops->vi_stride_align(&bpl);