Does the Jetson Orin NX platform require 64-byte alignment for device tree of VI to obtain image data? Currently, my sensor resolution is 400*31. I use the v4l2 command “v4l2-ctl --set-fmt-video=width=400,height=31,pixelformat=RGGB --stream-mmap --stream-count=1 -d /dev/video0 --stream-to=111.raw” to obtain the image and successfully get a raw data frame with a size of 12400. However, the data inside is not correct. Is this related to byte alignment and the preferred_stride size?
For your case you need to modify below in …/include/media/tegra_camera_core.h
#define TEGRA_MIN_HEIGHT 32U
On the left side is my data, and on the right side is the correct data. My data is organized in a pattern of four rows per cycle. The last 16 bytes of each row (400 bytes) are discarded for the first three rows, and for the fourth row, it is padded with 3x16 bytes of zero data at the end.
From this perspective, it seems that only 384 bytes of data can be obtained per line. This might be related to alignment with 32/64-byte boundaries.
Can I make the modifications to TEGRA_WIDTH_ALIGNMENT and TEGRA_STRIDE_ALIGNMENT in tegra_camera_core.h to 16?
The VI HW alignment is 32. I don’t think modify it could help on it.
Thanks
Thanks, I know it
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