Hi,
I am trying to enable SPI on my Nano devkit but I’m running into some problems. I’ve tried many things to get it to work but I always run into the same problem: There is no output on any of the CS
, SCK
, MOSI
lines for both SPI devices (checked with a scope). I have tried spidev_test
and my own program to write out data (verified to work on other devices).
The most straight-forward test I’ve done was on a clean install (downloaded sd-card image), and enabled SPI using jetsion-io. The devices do correctly show up as /dev/spidev*
. Furthermore sudo /opt/nvidia/jetson-io/config-by-function.py -l enabled
yields:
The following functions are enabled on the 40-pin header:
1. spi1
2. spi2
So it seems to me that jetson-io at least thinks SPI is properly enabled.
The file /boot/extlinux/extlinux.conf
correctly defaults to the JetsionIO configuration (with custom device tree /boot/kernel_tegra210-p3448-0000-p3449-0000-b00-user-custom.dtb
).
To double check the correct device tree gets loaded on boot, I extracted it using sudo dtc -I fs -O dts -o extracted.dts /proc/device-tree
. The file is attached: extracted.dts (334.1 KB)
These entries look correct to me:
header-40pin-pinmux {
phandle = <0x136>;
linux,phandle = <0x136>;
pin10 {
nvidia,enable-input = <0x1>;
nvidia,pins = "uart2_rx_pg1";
nvidia,tristate = <0x1>;
nvidia,function = "uartb";
nvidia,pull = <0x2>;
};
pin19 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi1_mosi_pc0";
nvidia,tristate = <0x0>;
nvidia,function = "spi1";
nvidia,pull = <0x1>;
};
pin37 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi2_mosi_pb4";
nvidia,tristate = <0x0>;
nvidia,function = "spi2";
nvidia,pull = <0x1>;
};
pin27 {
nvidia,enable-input = <0x1>;
nvidia,pins = "gen1_i2c_sda_pj0";
nvidia,tristate = <0x0>;
nvidia,io-high-voltage = <0x1>;
nvidia,function = "i2c1";
nvidia,pull = <0x0>;
};
pin35 {
nvidia,enable-input = <0x0>;
nvidia,pins = "dap4_fs_pj4";
nvidia,tristate = <0x1>;
nvidia,function = "rsvd3";
nvidia,pull = <0x1>;
};
pin23 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi1_sck_pc2";
nvidia,tristate = <0x0>;
nvidia,function = "spi1";
nvidia,pull = <0x1>;
};
pin13 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi2_sck_pb6";
nvidia,tristate = <0x0>;
nvidia,function = "spi2";
nvidia,pull = <0x1>;
};
pin21 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi1_miso_pc1";
nvidia,tristate = <0x0>;
nvidia,function = "spi1";
nvidia,pull = <0x1>;
};
pin11 {
nvidia,enable-input = <0x0>;
nvidia,pins = "uart2_rts_pg2";
nvidia,tristate = <0x1>;
nvidia,function = "rsvd2";
nvidia,pull = <0x0>;
};
pin7 {
nvidia,enable-input = <0x0>;
nvidia,pins = "aud_mclk_pbb0";
nvidia,tristate = <0x1>;
nvidia,function = "rsvd3";
nvidia,pull = <0x0>;
};
pin38 {
nvidia,enable-input = <0x0>;
nvidia,pins = "dap4_din_pj5";
nvidia,tristate = <0x1>;
nvidia,function = "rsvd3";
nvidia,pull = <0x1>;
};
pin28 {
nvidia,enable-input = <0x1>;
nvidia,pins = "gen1_i2c_scl_pj1";
nvidia,tristate = <0x0>;
nvidia,io-high-voltage = <0x1>;
nvidia,function = "i2c1";
nvidia,pull = <0x0>;
};
pin18 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi2_cs0_pb7";
nvidia,tristate = <0x0>;
nvidia,function = "spi2";
nvidia,pull = <0x2>;
};
pin5 {
nvidia,enable-input = <0x1>;
nvidia,pins = "gen2_i2c_scl_pj2";
nvidia,tristate = <0x0>;
nvidia,io-high-voltage = <0x1>;
nvidia,function = "i2c2";
nvidia,pull = <0x0>;
};
pin36 {
nvidia,enable-input = <0x0>;
nvidia,pins = "uart2_cts_pg3";
nvidia,tristate = <0x1>;
nvidia,function = "rsvd2";
nvidia,pull = <0x2>;
};
pin26 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi1_cs1_pc4";
nvidia,tristate = <0x0>;
nvidia,function = "spi1";
nvidia,pull = <0x2>;
};
pin16 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi2_cs1_pdd0";
nvidia,tristate = <0x0>;
nvidia,function = "spi2";
nvidia,pull = <0x2>;
};
pin3 {
nvidia,enable-input = <0x1>;
nvidia,pins = "gen2_i2c_sda_pj3";
nvidia,tristate = <0x0>;
nvidia,io-high-voltage = <0x1>;
nvidia,function = "i2c2";
nvidia,pull = <0x0>;
};
pin24 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi1_cs0_pc3";
nvidia,tristate = <0x0>;
nvidia,function = "spi1";
nvidia,pull = <0x2>;
};
pin22 {
nvidia,enable-input = <0x1>;
nvidia,pins = "spi2_miso_pb5";
nvidia,tristate = <0x0>;
nvidia,function = "spi2";
nvidia,pull = <0x1>;
};
pin12 {
nvidia,enable-input = <0x0>;
nvidia,pins = "dap4_sclk_pj7";
nvidia,tristate = <0x1>;
nvidia,function = "rsvd3";
nvidia,pull = <0x1>;
};
pin40 {
nvidia,enable-input = <0x0>;
nvidia,pins = "dap4_dout_pj6";
nvidia,tristate = <0x1>;
nvidia,function = "rsvd3";
nvidia,pull = <0x1>;
};
pin8 {
nvidia,enable-input = <0x0>;
nvidia,pins = "uart2_tx_pg0";
nvidia,tristate = <0x0>;
nvidia,function = "uartb";
nvidia,pull = <0x0>;
};
};
What does not look correct is the output of sudo cat /sys/kernel/debug/tegra_gpio
:
Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL
A: 0:0 64 40 40 24 00 00 000000
B: 0:1 f0 00 00 00 00 00 000000
C: 0:2 1f 00 00 00 00 00 000000
D: 0:3 00 00 00 00 00 00 000000
E: 1:0 40 00 00 40 00 00 000000
F: 1:1 00 00 00 00 00 00 000000
G: 1:2 0c 00 00 00 00 00 000000
H: 1:3 fd 99 00 60 00 00 000000
I: 2:0 07 07 03 02 00 00 000000
J: 2:1 f0 00 00 00 00 00 000000
K: 2:2 00 00 00 00 00 00 000000
L: 2:3 00 00 00 00 00 00 000000
M: 3:0 00 00 00 00 00 00 000000
N: 3:1 00 00 00 00 00 00 000000
O: 3:2 00 00 00 00 00 00 000000
P: 3:3 00 00 00 00 00 00 000000
Q: 4:0 00 00 00 00 00 00 000000
R: 4:1 00 00 00 00 00 00 000000
S: 4:2 a0 80 00 00 00 00 000000
T: 4:3 01 01 00 00 00 00 000000
U: 5:0 00 00 00 00 00 00 000000
V: 5:1 03 00 00 02 00 00 000000
W: 5:2 00 00 00 00 00 00 000000
X: 5:3 78 08 08 70 00 60 606000
Y: 6:0 06 00 00 02 00 00 000000
Z: 6:1 0f 08 08 04 00 06 020600
AA: 6:2 00 00 00 00 00 00 000000
BB: 6:3 01 00 00 00 00 00 000000
CC: 7:0 92 80 80 00 00 12 121200
DD: 7:1 01 00 00 00 00 00 000000
EE: 7:2 00 00 00 00 00 00 000000
FF: 7:3 00 00 00 00 00 00 000000
If I interpret it correctly, the SPI pins at C00
-C04
are set up as GPIO (CNF = 0x1f = 00011111) and not SFIO (0x00). I don’t understand why though, since the dtb seems correct?