Can't enable Jetson Nano SPI (emmc module)

[Luna2020]

Hi NV_Team,

I am using JetPack4.4/4.5 to do Nano spi1 loop test all failed. I have modify the pinmux of spi1 configuration and remove ‘C’ in gpio definition.

I have removed all of the gpio group B and C from this file hardware/nvidia/platform/t210/porg/kernel-dts/porg-platforms/tegra210-porg-gpio-p3448-0002-b00.dtsi 

tegra210-porg-pinmux-p3448-0002-b00.dtsi
spi1_mosi_pc0 {
	nvidia,pins = "spi1_mosi_pc0";
	nvidia,function = "spi1";
	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
	nvidia,tristate = <TEGRA_PIN_DISABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

spi1_miso_pc1 {
	nvidia,pins = "spi1_miso_pc1";
	nvidia,function = "spi1";
	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
	nvidia,tristate = <TEGRA_PIN_DISABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

spi1_sck_pc2 {
	nvidia,pins = "spi1_sck_pc2";
	nvidia,function = "spi1";
	nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
	nvidia,tristate = <TEGRA_PIN_DISABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

spi1_cs0_pc3 {
	nvidia,pins = "spi1_cs0_pc3";
	nvidia,function = "spi1";
	nvidia,pull = <TEGRA_PIN_PULL_UP>;
	nvidia,tristate = <TEGRA_PIN_DISABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

spi1_cs1_pc4 {
	nvidia,pins = "spi1_cs1_pc4";
	nvidia,function = "spi1";
	nvidia,pull = <TEGRA_PIN_PULL_UP>;
	nvidia,tristate = <TEGRA_PIN_DISABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};

tegra210-porg-p3448-common.dtsi
spi@7000d400 { /* SPI 1 to 40 pin header */
	status = "okay";
	spi@0 {
		status = "okay";
		compatible = "spidev";
		reg = <0x0>;
		spi-max-frequency = <33000000>;
		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <7>;
		};
	};
	spi@1 {
		status = "okay";
		compatible = "spidev";
		reg = <0x1>;
		spi-max-frequency = <33000000>;
		controller-data {
			nvidia,enable-hw-based-cs;
			nvidia,rx-clk-tap-delay = <7>;
		};
	};
};

nvidia@nano:~/tools/spi$ sudo ./spidev_test -D /dev/spidev0.0 -v -p ss
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | 73 73 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __  | ss
RX | 00 00 __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __ __  | ..


nvidia@nano:~$ sudo cat /sys/kernel/debug/tegra_gpio
Name:Bank:Port CNF OE OUT IN INT_STA INT_ENB INT_LVL
 A: 0:0 64 40 40 04 00 00 000000
 B: 0:1 f0 00 00 00 00 00 000000
 C: 0:2 1f 00 00 00 00 00 000000
 D: 0:3 00 00 00 00 00 00 000000
 E: 1:0 40 40 00 00 00 00 000000


nvidia@nano:~$ sudo cat /sys/kernel/debug/tegra_pinctrl_reg |grep 'spi'
Bank: 1 Reg: 0x70003050 Val: 0x0000e044 -> spi1_mosi_pc0
Bank: 1 Reg: 0x70003054 Val: 0x0000e044 -> spi1_miso_pc1
Bank: 1 Reg: 0x70003058 Val: 0x0000e044 -> spi1_sck_pc2
Bank: 1 Reg: 0x7000305c Val: 0x0000e048 -> spi1_cs0_pc3
Bank: 1 Reg: 0x70003060 Val: 0x0000e048 -> spi1_cs1_pc4

I have checked this topic, but not worked, can you help to check my configration about SPI on Nano?

Check pinmux on spi0&1 on jetson-nano

Hi, Shane I had done below modifications. But I don’t see too much difference in tegra_gpio [gpio] Modifications: cd /home/jetson/Linux_for_Tegra/source/public vi u-boot/board/nvidia/p3450-porg/pinmux-config-p3450-porg.h static const struct tegra_gpio_config p3450_porg_gpio_inits = { GPIO_INIT(B, 4, IN), GPIO_INIT(B, 5, IN), GPIO_INIT(B, 6, IN), GPIO_INIT(B, 7, IN), GPIO_INIT(DD, 0, IN), GPIO_INIT(C, 0, IN), GPIO_INIT(C, 1, IN), GPIO_INIT(C, 2, …

Jetson Nano and SPI CAN Bus

Hello, I am trying to set up the SPI CAN module ( Amazon.com ). Here is what I have done so far and where I am stuck. Here is pinout mapping between Jetson Nano and the above SPI can module. Please note this module has 8Mhz cristal where higher prices modules use 16Mhz. Not sure if this clock is used for SPI or CAN bus signal sampling and if this needs to be accounted for somewhere on Nano configuration. J41 Pin → SPI module 19 SI 21 SO 23 SCK …

[ShaneCCC]

Check the device tree to remove the GPIO C group in gpio@6xxxx scope

        gpio: gpio@6000d000 {
                gpio-init-names = "default";
                gpio-init-0 = <&gpio_default>;

                gpio_default: default {
                        gpio-input = <
                                TEGRA_GPIO(BB, 0)
                                TEGRA_GPIO(B, 4)
                                TEGRA_GPIO(B, 5)
                                TEGRA_GPIO(B, 6)
                                TEGRA_GPIO(B, 7)
                                TEGRA_GPIO(DD, 0)
                                TEGRA_GPIO(E, 6)
                                TEGRA_GPIO(S, 5)
                                TEGRA_GPIO(A, 5)
                                TEGRA_GPIO(X, 4)
                                TEGRA_GPIO(X, 5)
                                TEGRA_GPIO(X, 6)
                                TEGRA_GPIO(Y, 1)
                                TEGRA_GPIO(Y, 2)
                                TEGRA_GPIO(V, 0)
                                TEGRA_GPIO(V, 1)
                                TEGRA_GPIO(Z, 0)
                                TEGRA_GPIO(Z, 2)
                                TEGRA_GPIO(J, 5)
                                TEGRA_GPIO(J, 6)
                                TEGRA_GPIO(J, 4)
                                TEGRA_GPIO(J, 7)
                                TEGRA_GPIO(G, 2)
                                TEGRA_GPIO(G, 3)
                                TEGRA_GPIO(C, 0)
                                TEGRA_GPIO(C, 1)
                                TEGRA_GPIO(C, 2)
                                TEGRA_GPIO(C, 3)
                                TEGRA_GPIO(C, 4)
                                TEGRA_GPIO(H, 2)
                                TEGRA_GPIO(H, 5)
                                TEGRA_GPIO(H, 6)
                                TEGRA_GPIO(I, 1)
                                TEGRA_GPIO(CC, 4)
                                >;
                        gpio-output-low = <
                                TEGRA_GPIO(S, 7)
                                TEGRA_GPIO(T, 0)

[Luna2020]

Hi ShaneCCC,

I have removed GPIOC group in tegra210-porg-gpio-p3448-0002-b00.dtsi

/ {
	gpio: gpio@6000d000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_default>;

		gpio_default: default {
			gpio-input = <
				TEGRA_GPIO(BB, 0)
				TEGRA_GPIO(B, 4)
				TEGRA_GPIO(B, 5)
				TEGRA_GPIO(B, 6)
				TEGRA_GPIO(B, 7)
				TEGRA_GPIO(DD, 0)
				TEGRA_GPIO(E, 6)
				/*TEGRA_GPIO(S, 5)*/
				TEGRA_GPIO(A, 5)
				TEGRA_GPIO(X, 4)
				TEGRA_GPIO(X, 5)
				TEGRA_GPIO(X, 6)
				TEGRA_GPIO(Y, 1)
				TEGRA_GPIO(Y, 2)
				TEGRA_GPIO(V, 0)
				TEGRA_GPIO(V, 1)
				/*TEGRA_GPIO(Z, 0)*/
				TEGRA_GPIO(Z, 2)
				TEGRA_GPIO(G, 2)
				TEGRA_GPIO(G, 3)
				TEGRA_GPIO(H, 2)
				TEGRA_GPIO(H, 5)
				TEGRA_GPIO(H, 6)
				TEGRA_GPIO(I, 1)
				TEGRA_GPIO(CC, 4)
				>;
			gpio-output-low = <
				TEGRA_GPIO(S, 7)
				TEGRA_GPIO(T, 0)
				TEGRA_GPIO(H, 0)
				TEGRA_GPIO(H, 3)
				TEGRA_GPIO(H, 4)
				TEGRA_GPIO(H, 7)
				TEGRA_GPIO(I, 2)
				TEGRA_GPIO(E, 6) /* PoE Power enable*/
				TEGRA_GPIO(Z, 0) /* WDT enable---MCU_PIN2 */
				>;
			gpio-output-high = <
				TEGRA_GPIO(A, 6)
				TEGRA_GPIO(X, 3)
				TEGRA_GPIO(CC, 7)
				TEGRA_GPIO(V, 0)
				TEGRA_GPIO(I, 0)
				TEGRA_GPIO(S, 5)  /*USB Hub Power default High*/
				>;
		};
	};
};

tegra210-p3448-0002-p3449-0000-b00.dtb (222.3 KB)

[ShaneCCC]

1. Did you confirm the modification by dump the context of /sys/proc/device-tree to confirm it?

2. Have apply the path from below link and add gpio-hog{} to try.

Enabling spidev on the jetson nano is hanging when flashing

Hi All J4.2.1 have regression for this feature. Please apply below patch to try. diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index e1010440f32d..09dd6e4a8698 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c @@ -217,6 +217,11 @@ static void tegra_gpio_enable(struct tegra_gpio_info *tgi, int gpio) tegra_gpio_mask_write(tgi, GPIO_MSK_CNF(tgi, gpio), gpio, 1); } +static void tegra_gpio_disable(struct tegra_gpio_info *tgi, int gpio) +{ + …

[Luna2020]

Hi ShaneCCC,

Thanks for your information, add gpios and gpio-hog{} , this problem has beed fixed.

tegra210-porg-gpio-p3448-0002-b00.dtsi 
gpio_default: default {
	gpio-hog;
	function;
	gpios = <
		TEGRA_GPIO(C, 0) 0 
		TEGRA_GPIO(C, 1) 0 
		TEGRA_GPIO(C, 2) 0 
		TEGRA_GPIO(C, 3) 0
		TEGRA_GPIO(C, 4) 0
	>;
	...
};