Change the device tree for DisplayPort on DP1?

Just want to double confirm.

In your previous test, when we asked you to wire another 1.8v to the HPD pin, did you also check the dmesg? Was there any new log coming out when 1.8v input?

Hi,

I have of course checked dmesg, unfortunately I have not seen any new logging.

I have also made further tests with the hardware.

So I have installed a hardware filter circuit at HPD for test purposes.
I recorded the signal at HPD again at 100ns/div. The signal looks very clean at the HPD pin:

And again another pin for HPD selected.
But unfortunately nothing new was logged in dmesg!

Only I have always seen the switching:

CC: 7:0 92 80 80 02 00 10 101000
CC: 7:0 92 80 80 00 00 10 101000

Hi @ElectronicSystems ,

Could you also check below node when you hotplug the DP cable and share the result?

Also, I would like to ask, is there any node as tegra_dp1 on your side? or only tegra_dp0 exists?

HI WayneWWW,

Here the result with display ON in running mode:

Display_on

Here the result with display OFF in running mode:

Display_off

Only tegra_dp0 exists:

tegra_dp0

Thank you for your efforts :-)

Is the result you just shared from the emmc module or the sd module?
Also, when you said “On/Off” , are you talking about you hotplug the cable? or you just powering on/off the monitor?

Please do hotplug the cable and check the register.

I only use the emmc module, so it comes from the emmc module.

I have tried both. I plugged and unplugged the cable, and turned the monitor on and off…

I have connected the cable and
I checked the registers, nothing changes:

tegra_dp0

So you’ve made the emmc module as the same setting as your sd module device tree setting, right?

I mean those setting in tegradc, sor1.

yes that is exactly what I did.

These are the current settings for tegradc, sor1:

Hi,

Please also share below register dump when you hotplug the DP cable.

CLK_RST_CONTROLLER_CLK_OUT_ENB_X_0
0x60006280

CLK_RST_CONTROLLER_RST_DEVICES_X_0
0x6000628c

CLK_RST_CONTROLLER_CLK_OUT_ENB_Y_0
0x60006298

CLK_RST_CONTROLLER_RST_DEVICES_Y_0
0x600062a4

The method to dump register is still same. Using “sudo busybox devmem register_addr”.

Hi,

here are the register dump results:

sudo busybox devmem 0x60006280
Result = 0x03000780

with sudo busybox devmem 0x6000628c
Result = 0x01642009

with sudo busybox devmem 0x60006298
Result = 0x40048340

with sudo busybox devmem 0x600062a4
Result = 0x0FE11099

All results at when i hotplug the DP cable.

Just for info:
This value changes briefly to 0x40048342 after switching (5s) on or off. After that the value switches back to 0x40048340.The other register values do not change.

42

Hi,

What do you mean switch on/off ? The DP monitor power on/off?

Hi,

Oh sorry, I mean of course after the hotplug the DP cable.

Does that always happen when you hotplug the DP cable? I mean you can see that in each hotplug of DP cable?

Yes exactly, I plug in the cable
then the value is 0x40048340
after about 5 seconds the value changes to
0x40048342 and after that the value is again
value 0x40048340. As you can see in the picture:

Oh no, the value changes even without the cable sorry. Changing the value has nothing to do with plugging and unplugging.

Hi,

Can you use “dc@54240000” instead of the one your are using now for SOR1?

Also, for the "nvidia,out-parent-clk ", please use "nvidia,out-parent-clk = “pll_d2_out0”; but not pll_d2 and see if it can help.

Hi,

That is also a good idea, I will now couple sor1 with dc@54240000 instead of dc@54200000.

I will change that too!
I can only test it this afternoon…
Thank you!

Please be careful these two are combined together but not separate patch.

Use dc@54240000 and pll_d2_out0 simultaneously.

Okay, I will do that.
Thanks!