Earlier Jetson AGX Orin documentation referenced 4× MGBE interfaces with up to 40 Gbps aggregate throughput, which influenced their initial architecture. However, current datasheets (v1.8) now indicate a single MGBE interface limited to 10 Gbps, and recent pinmux updates remove the additional MGBE lanes entirely. This appears to be a significant change from earlier public information.
Were four MGBE interfaces ever functional or verified on AGX Orin, either in silicon or at the module level?
If support was reduced, what was the reason (signal integrity, compliance, power, reliability, etc.)?
Were the additional MGBE lanes ever partially usable (e.g., at reduced speeds), or are they fully unsupported/disabled?
Has this limitation always applied to all AGX Orin modules, or were there variants where quad‑MGBE was achieved?
We’ve noticed a similar reduction in documented MGBE interfaces on Jetson Thor—does this reflect a broader platform constraint?
Thank you for the clarification that Jetson AGX Orin supports only one verified/supported MGBE on the module.
As a follow-up: if a third-party carrier board advertises 2x 10GbE interfaces for Jetson AGX Orin, does that necessarily require more than one native MGBE interface on the module, or could the second 10GbE interface be implemented through other hardware such as PCIe Ethernet controllers or other onboard networking devices?
I’m trying to distinguish between:
supported native Jetson-module Ethernet capability, and
total Ethernet ports that a carrier-board vendor may provide at the system level.
On a third-party carrier board with 2x 10GbE, one or both could be from PCIe to Ethernet on the carrier board. You would have to check with the vendor about their carrier board’s implementation.