Controlling TSC_EDGE_OUT0 pin from sysfs in Orin AGX

Hi,

We are using TSC_EDGE_OUT0 (GPIO 10 , A62) pin to generate a PWM signal of 30 Hz frequency from Orin AGX(L4T 35.2.1). We are able to generate 30 Hz after adding below entry in device tree.

tsc_sig_gen@c6a0000 {
               compatible = "nvidia,tegra234-cdi-tsc";
               ranges = <0x0 0x0 0xc6a0000 0x10000>;
               reg = <0x0 0xc6a0000 0x0 0x18>;
               #address-cells = <1>;
               #size-cells = <1>;
               status = "okay";
                       /* EDGE_OUT #0 */
                       generator@380 {
                               reg = <0x380 0x80>;
                               freq_hz = <30>;
                               duty_cycle = <50>;
                               offset_ms = <0>;
                               status = "okay";
                               };
       };

We need to change this PWM frequency during runtime. Is there any way to control the TSC_EDGE_OUT0 pin after boot up through sysfs or through any scripts/application ?

Hi kaviyadharshini.m,

Are you using the devkit or custom board for AGX Orin?

Have you tried the following command to control PWM through sysfs?
Strange behaviour with Jetson Nano DevKit PWM signal - #5 by WayneWWW

Hi KevinFFF,

We are using Orin AGX Devkit.

When we tried to list the available PWM device in the kit, the PWM device of the TSC_EDGE_OUT0 pin was not listed under this.

Find the list of available PWM device in the Orin AGX:

$ cat /sys/kernel/debug/pwm

platform/39c0000.tachometer, 1 PWM device

pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal

platform/32f0000.pwm, 1 PWM device

pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal

platform/32c0000.pwm, 1 PWM device

pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal

platform/32a0000.pwm, 1 PWM device

pwm-0 (pwm-fan ): requested enabled period: 45334 ns duty: 45333 ns polarity: normal

platform/3280000.pwm, 1 PWM device

pwm-0 ((null) ): period: 0 ns duty: 0 ns polarity: normal

As per our understanding, the TSC_EDGE_OUT0 pin is enumerated as c6a0000.tsc_sig_gen instead of .pwm in the /sys/kernel/devices/platform directory.

Could you help us to control this TSC pin from sysfs?

It seems this pin(TSC_EDGE_OUT0) is used by cdi_tsc.c driver rather than pwm driver so that it is not exported as other PWM pin and could be controlled through sysfs.

What’s your use case for this pin?

Hi KevinFFF,

We are configuring the TSC_EDGE_OUT0 pin to generate a PWM signal of 30 Hz by configuring device tree as mentioned in the first post. This PWM signal will be used as trigger for the sensor to operate in slave mode.

By controlling the frequency of this pin, fps of the sensor will be changed. So we would like to change the frequency of this pin dynamically after board bootup. So is there any other way to change the frequency of this pin dynamically?

Currently there is no way apart from DT we can set frequency for PWM.

It seems you have to modify the driver(cdi_tsc.c) to export it to sysfs for this use case.

Would you like to use cam_cdi_tsc.c or cdi_tsc.c ?

Hi KevinFFF,

We would like to use cdi_tsc.c

Okay, cdi_tsc.c will start Fsync on boot by default.

This topic was automatically closed 14 days after the last reply. New replies are no longer allowed.