Jetson AGX Orin

Robotics & Edge Computing Jetson Systems Jetson AGX Orin
1

Hi,

I’m trying to find more info on the Jetson AGX Orin SoC regarding any General Purpose Timer HW peripherals. Specifically, register definitions and PIN configurations to the GPT peripheral. We’d like to have the SoC discipline timing using the GPT peripheral.

4

Hi, for Orin related docs, please refer to those in DLC.

5

Hi Trumany,

Thank you for the response. I downloaded what appears to be summarized version of the datasheet for the SoC. However, I’m still missing information regarding register definition of the various peripherals available on the Jetson Orin SoC. Where can I obtain a more comprehensive datasheet with register definition? (Sufficient to create device drivers for the peripherals). I do no see any other docs based on the link you sent on you previous message. Thanks!

6

Hi Trumany,

I actually did find the “Orin Series System-on-Chip Technical Reference Manual” which has the information I’m looking for. I see that there’s mention of support of using a PPS signal with the TSC. I saw that from this post below from 2022 that there’s no Low level driver support yet for the TSC_EDGE signal.

As followup question to this previous post, is there a list of support pins that can be an input to this TSC_EDGE signal as a PPS input. Even if it’s currently unsupported in the driver code I’d like to future proof our board by wiring the correct pin when the support is available. As a backup, we can just use this pin as a GPIO with edge detect and a hw interrupt at the cost of less precise timing.

8

hello matthew141,

here’s an example of DTS changes, please add below device tree node in kernel dtb

pps {
gpios = <&tegra_aon_gpio TEGRA194_AON_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
compatible = “pps-gpio”;
assert-falling-edge;
status = “okay”;
};

here’re steps for your reference.

  1. Set CONFIG_PPS_CLIENT_GPIO=m.
  2. Make sure that it is set in tegra_defconfig as well
  3. Build, and manually copy device tree blob to target.
  4. After adding the PPS GPIO with insmod, /dev/pps1 should shown
9

Hi Jerry,

Thanks for the response! Our EE engineers are looking at the pin you’re suggesting. To clarify, will this pin route and use the TSC Capture logic described in the image below? We ultimately want to use this HW logic for more precise timing.

Image take from the post linked from [liyutai]

image
image870×880 276 KB

10

hello matthew141,

above comment #8, it’s steps to use GPIO as PPS interface.
or… you might refer to Topic 294196 as an example with SOC_GPIO50/TSC_EDGE_OUT0.

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