Hello everyone, I am trying to use the Design for Debug (DFD) architecture to capture the activity of one of the processor elements. Due to the constraints of this project, I cannot rebuild the kernel with the CoreSight flags enabled. I am able to do direct memory writes and reads. Using the NVIDIA…

Hi, We have confirmed CoreSight is not supported on Jetpack 6 Orin. Please check Jetson Orin Nano CoreSight ETM enabled in kernel but /sys/bus/coresight/devices is empty - #11 by DaneLLL

Hi DaneLLL, That is an interesting thread but I am having difficulty applying it to my situation for a couple reasons. The first is that the ETR is further downstream from the ETF. The technical reference has the flow: ETM > Cluster 0 Funnel > CCPLEX TOP Funnel > Major Funnel > ETF > Replicator > …

Hello everyone, Any thoughts on this issue or something else I could look into? Regards, Brian

Hi DaneLLL, I really appreciate you digging into this even if it was to confirm a dead end which is still really valuable information to me. I take this information and explore the alternates that are open to me. Thanks, Brian

Hi @brian0002 , May I confirm whether your Orin NX has 8 GB or 16 GB RAM? Thanks

Hi @brian0002 , Please refer to the related topics: [image] Jetson Orin Nano CoreSight ETM enabled in kernel but /sys/bus/coresight/devices is empty Jetson Orin Nano Hi @1209762583 . Please refer below steps: Host Side (Ubuntu) Sync the L4T source tree for t…

CoreSight Embedded Trace FIFO (ETF) remains empty

Robotics & Edge Computing Jetson Systems Jetson Orin NX

DaneLLL April 2, 2026, 4:09am 4

Hi,
Please check this and give it a try:
【Jetson AGX Orin】How to config to trace to system RAM using Coresight with ETR in Arm Development Studio by Arm DStream debugger? - #8 by Bibek

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CoreSight Embedded Trace FIFO (ETF) remains empty

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