Custom Board IO pins access

Hi,
I have to set up a Jetson Nano module image for a custom carrier board that got provided by a customer. Flashing the default image to the carrier board works, so that is not the problem.
The compute model is a eemc 16 GB Jetson Nano tegra210-p3448-0002-p3449-0000-b00.dts on tegra-l4t-r32.5.1.

I followed the quick setup steps (see create_all.sh) and the Pinmux Changes Step (https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide/adaptation_and_bringup_nano.html#wwpID0E0EQ0HA), i.e. updated the kernel/dtb/ files.

Now I have two problems. As you see from the pinmux.xlsm, the customer has connected an LED to the DisplayPort Hotplugdetection on SODIMM 96 and wants to use that as a general GPIO. First question, is that even possible or do I have to tell the customer to design a new carrier board?
Now, the board detects the Displayport on startup as plugged in (no display ports on the carrier board, so probably the LED) and refuses to open oem-config in terminal mode (see log.txt). I can force terminal mode by editing the nv-oem-config.sh file.
Now I have a running linux. How do I access the changed GPIO ports (and one I2C-2 Port)? I don’t see them in /sys/kernel/debug/gpio. If I try to mount gpio 94 and 95, I get an error. If I mount 96 (leds are connected to SODIMM 95, 96, 97) via
echo 96 > /sys/class/gpio/export
echo out > /sys/class/gpio/gpio96/direction
echo 1 > /sys/class/gpio/gpio96/value
then I don’t see any change in Voltage on the pin.
Do I have to change something else to propagate the changed pin layout to the running system? Rebuild Uboot too? Modify kernel dts files?
Greetings
Stefan

Due to connection refused on upload, here are the files as google drive:
pinmux.xlsm https://drive.google.com/file/d/1Zv9rR9yYQCi0w0n-YIhCApNKpjXprXK8/view?usp=sharing
log.txt log.txt - Google Drive
create_all.sh create_all.sh - Google Drive

Hi,

If you want to use that gpio, which was for DP/HDMI, please also disable the tegradc and sor node in your device tree to make sure display driver won’t try to use those gpio. And of course you will lose the capability of monitor.

Also, why do you get the gpio number “96”? Are we talking about ping CC01 and CC06 for the DP/HDMI hpd?

Thanks for the tipp, I wouldn’t have thought about deactivating them. The customer hasn’t installed any monitor port anyway, so that won’t be a problem.

Is there documentation about how to access/number custom IO Pins? The xlsm sheet does not provide one and /sys/kernel/debug/gpio only gives the SODIMM Pins (0-239) and on position 95 there is no gpio pin there, so I used that number. I assume that is incorrect? Most google results I found just reference the 40 pin header of the devkit.

The pins on SODIMM 94, 95, 96 probably don’t show up due to the still active display modules you mentioned in the linux kernel?

/sys/kernel/debug/gpio

gpio-0 ( )
gpio-1 ( )
gpio-2 ( |pcie_wake ) in hi
gpio-3 ( )
gpio-4 ( )
gpio-5 ( )
gpio-6 ( |system-suspend-gpio ) out hi
gpio-7 ( )
gpio-8 ( )
gpio-9 ( )
gpio-10 ( )
gpio-11 ( )
gpio-12 (SPI1_MOSI )
gpio-13 (SPI1_MISO )
gpio-14 (SPI1_SCK )
gpio-15 (SPI1_CS0 )
gpio-16 (SPI0_MOSI )
gpio-17 (SPI0_MISO )
gpio-18 (SPI0_SCK )
gpio-19 (SPI0_CS0 )
gpio-20 (SPI0_CS1 )
gpio-21 ( )
gpio-22 ( )
gpio-23 ( )
gpio-24 ( )
gpio-25 ( )
gpio-26 ( )
gpio-27 ( )
gpio-28 ( )
gpio-29 ( )
gpio-30 ( )
gpio-31 ( )
gpio-32 ( )
gpio-33 ( )
gpio-34 ( )
gpio-35 ( )
gpio-36 ( )
gpio-37 ( )
gpio-38 (GPIO13 )
gpio-39 ( )
gpio-40 ( )
gpio-41 ( )
gpio-42 ( )
gpio-43 ( )
gpio-44 ( )
gpio-45 ( )
gpio-46 ( )
gpio-47 ( )
gpio-48 ( )
gpio-49 ( )
gpio-50 (UART1_RTS )
gpio-51 (UART1_CTS )
gpio-52 ( )
gpio-53 ( )
gpio-54 ( )
gpio-55 ( )
gpio-56 ( )
gpio-57 ( )
gpio-58 ( )
gpio-59 ( )
gpio-60 ( )
gpio-61 ( )
gpio-62 ( )
gpio-63 ( )
gpio-64 ( )
gpio-65 ( )
gpio-66 ( )
gpio-67 ( )
gpio-68 ( )
gpio-69 ( )
gpio-70 ( )
gpio-71 ( )
gpio-72 ( )
gpio-73 ( )
gpio-74 ( )
gpio-75 ( )
gpio-76 (I2S0_FS )
gpio-77 (I2S0_DIN )
gpio-78 (I2S0_DOUT )
gpio-79 (I2S0_SCLK )
gpio-80 ( )
gpio-81 ( )
gpio-82 ( )
gpio-83 ( )
gpio-84 ( )
gpio-85 ( )
gpio-86 ( )
gpio-87 ( )
gpio-88 ( )
gpio-89 ( )
gpio-90 ( )
gpio-91 ( )
gpio-92 ( )
gpio-93 ( )
gpio-94 ( )
gpio-95 ( )
gpio-96 ( )
gpio-97 ( )
gpio-98 ( )
gpio-99 ( )
gpio-100 ( )
gpio-101 ( )
gpio-102 ( )
gpio-103 ( )
gpio-104 ( )
gpio-105 ( )
gpio-106 ( )
gpio-107 ( )
gpio-108 ( )
gpio-109 ( )
gpio-110 ( )
gpio-111 ( )
gpio-112 ( )
gpio-113 ( )
gpio-114 ( )
gpio-115 ( )
gpio-116 ( )
gpio-117 ( )
gpio-118 ( )
gpio-119 ( )
gpio-120 ( )
gpio-121 ( )
gpio-122 ( )
gpio-123 ( )
gpio-124 ( )
gpio-125 ( )
gpio-126 ( )
gpio-127 ( )
gpio-128 ( )
gpio-129 ( )
gpio-130 ( )
gpio-131 ( )
gpio-132 ( )
gpio-133 ( )
gpio-134 ( )
gpio-135 ( )
gpio-136 ( )
gpio-137 ( )
gpio-138 ( )
gpio-139 ( )
gpio-140 ( )
gpio-141 ( )
gpio-142 ( )
gpio-143 ( )
gpio-144 ( )
gpio-145 ( )
gpio-146 ( )
gpio-147 ( )
gpio-148 ( )
gpio-149 (GPIO01 )
gpio-150 ( )
gpio-151 ( |camera-control-outpu) out lo
gpio-152 ( |camera-control-outpu) out lo
gpio-153 ( )
gpio-154 ( )
gpio-155 ( )
gpio-156 ( )
gpio-157 ( )
gpio-158 ( )
gpio-159 ( )
gpio-160 ( )
gpio-161 ( )
gpio-162 ( )
gpio-163 ( )
gpio-164 ( )
gpio-165 ( )
gpio-166 ( )
gpio-167 ( )
gpio-168 (GPIO07 )
gpio-169 ( )
gpio-170 ( )
gpio-171 ( )
gpio-172 ( )
gpio-173 ( )
gpio-174 ( )
gpio-175 ( )
gpio-176 ( )
gpio-177 ( )
gpio-178 ( )
gpio-179 ( )
gpio-180 ( )
gpio-181 ( )
gpio-182 ( )
gpio-183 ( )
gpio-184 ( )
gpio-185 ( )
gpio-186 ( )
gpio-187 ( |? ) out hi
gpio-188 ( )
gpio-189 ( |Power ) in hi IRQ
gpio-190 ( |Forcerecovery ) in hi IRQ
gpio-191 ( )
gpio-192 ( )
gpio-193 ( )
gpio-194 (GPIO12 )
gpio-195 ( )
gpio-196 ( )
gpio-197 ( )
gpio-198 ( )
gpio-199 ( )
gpio-200 (GPIO11 )
gpio-201 ( )
gpio-202 ( |pwm-fan-tach ) in hi IRQ
gpio-203 ( |vdd-3v3-sd ) out lo
gpio-204 ( )
gpio-205 ( )
gpio-206 ( )
gpio-207 ( )
gpio-208 ( )
gpio-209 ( )
gpio-210 ( )
gpio-211 ( )
gpio-212 ( )
gpio-213 ( )
gpio-214 ( )
gpio-215 ( )
gpio-216 (GPIO09 )
gpio-217 ( )
gpio-218 ( )
gpio-219 ( )
gpio-220 ( )
gpio-221 ( )
gpio-222 ( )
gpio-223 ( )
gpio-224 ( )
gpio-225 ( |hdmi2.0_hpd ) in lo IRQ
gpio-226 ( )
gpio-227 ( )
gpio-228 ( |extcon:extcon@1 ) in lo IRQ
gpio-229 ( )
gpio-230 ( )
gpio-231 ( )
gpio-232 (SPI1_CS1 )
gpio-233 ( )
gpio-234 ( )
gpio-235 ( )
gpio-236 ( )
gpio-237 ( )
gpio-238 ( )
gpio-239 ( )

gpiochip1: GPIOs 504-511, parent: platform/max77620-gpio, max77620-gpio, can sleep:
gpio-505 ( |spmic-default-output) out hi
gpio-507 ( |vdd-3v3-sys ) out hi
gpio-510 ( |enable ) out lo
gpio-511 ( |avdd-io-edp-1v05 ) out lo

hello stefan.asbeck ,

as you can see in pinmux spreadsheets, the pin, HDMI_INT_DP_HPD, it has pin muxing of GPIO3_PCC.01.
there’s gpio port behind the “P”, according to tegra-gpio.h, it’s port CC, #define TEGRA_GPIO_PORT_CC 28
here’s formula to calculate the GPIO number of this pin, #define TEGRA_GPIO(port, offset) ((TEGRA_GPIO_PORT_##port * 8) + offset)
hence, port number is… (28 * 8) +1 = 225.

Thank you.

For people that are stuck in a similiar situation, modifying
sources/hardware/nvidia/platform/t210/porg/kernel-dts/tegra210-porg-p3448-common.dtsi
and setting the status of the nodes dc@54200000, dc@54240000, sor, sor1, dpaux and dpaux1 all to disabled fixed the issue by making the pins accessible and allowing for a oem-config through the serial connection without workarounds.