Hello. I’m using Jetson Nano 2GB, model P3541 with JetPack 4.6 (L4T 32.6.1).
I need to change some default settings for some pins, e.g. to disable Pull-Up/Pull-Down at startup. What I’ve done following the documentation:
In the pinmux table, I changed the value of the column " Req. Initial State " (col. AU) and set it as " Drive 0 ". By the way, I tried all the values from the list except for " Input PD/PU ". I didn’t make any other changes.
I generated two DTSI files (by pressing on the button “Generate DT File”) and copied them to the folder Linux_for_Tegra/source/public/hardware/nvidia/platform/t210/batuu/kernel-dts/batuu-platforms/ : tegra210-batuu-gpio-p3448-0003.dtsi and tegra210-batuu-pinmux-p3448-0003.dtsi accordinly.
I successfully compiled a new DTB file by the commands: make ARCH=arm64 tegra_defconfig and make ARCH=arm64 dtbs and didn’t forget to set CROSS_COMPILE variable before doing that (export CROSS_COMPILE=…).
I took the new file tegra210-p3448-0003-p3542-0000.dtb from the folder Linux_for_Tegra/source/public/kernel/kernel-4.9/arch/arm64/boot/dts/ and put it to the folder Linux_for_Tegra/kernel/dtb/.
Then, I successfully flashed my Jetson Nano by the command: sudo ./flash.sh -k DTB jetson-nano-2gb-devkit mmcblk0p1 .
But, after restarting, I saw no changes. The pins, which I expected to see with the disabled Pull-Down state, have remained in that state (I’m watching them on an oscilloscope).
Could someone to explain what I did wrong or how to do it right? Any suggestions, please.
gpiochip1: GPIOs 504-511, parent: platform/max77620-gpio, max77620-gpio, can sleep:
gpio-505 ( |spmic-default-output) out hi
gpio-507 ( |vdd-3v3-sys ) out hi
gpio-510 ( |enable ) out hi
gpio-511 ( |avdd-io-edp-1v05 ) out lo
Hello Jerry,
I’m trying to configure all of these ones: gpio- 12, 13, 14, 15, 16, 17, 18, 19, 20, 38, 50, 51, 76, 77, 78, 79, 149, 168, 194, 200, 216, 232. Actually, I need one pin only but I’m trying all the possible…
it’s device tree, i.e. tegra210-jetson_nano_2gb_module-pinmux.dtsi, to assign the settings,
please access Applications Note for 40-Pin Expansion Header GPIO Usage Considerations.
you may also refer to [“Keeper” Pull-up and Pull-down Resistors] by checking the pin via an oscilloscope,
thanks