Hi NV team:
Our custom carrier board also had RTC read errors.
Our problem is different from the phenomenon mentioned on the forum, please allow me to describe.
I would like to inform you in advance that my English is not very good. If there is something unclear, I can express it in Chinese later.
The problem with our carrier board is that after we remove the DC IN directly, executing sudo hwclock will get the “hwclock: select() to /dev/rtc0 to wait for clock tick timed out” message.
But if we press the Power button to shut down first, and then unplug the DC IN, there will be no problem.
Attached is the log file.
Can you give us directions to fix this? Thanks
Hi NV team:
log.txt (70.3 KB)
Could you follow below like to modify the kernel configure to new kernel to verify.
Thank you for your reply. I would like to add a message to you. We use the same Orin SOM to pass the AGX Orin Developer Kit test.
But it doesn’t work on our custom carrier board, and the problem I described before will happen.
But I think this is a hardware problem, you can try to remove the C543 of the AGX Orin Developer Kit.
We reproduced the problem this way, so I think it’s a hardware issue.
Looking forward to your follow-up reply, thank you.
You can compare your design to reference to find out difference in power part. Your design should follow the Figure 5-4. Power Down Sequence Uncontrolled Case in DG, have you measured the sequence? Also the discharge design should be considered, you can find the discharge circuit design in P3737 schematic.
Thank you for your reply. You are right, this problem is indeed caused by Power Down Sequence.
We compared the AGX Orin Developer Kit with our board and found the difference in SYS_VIN_HV and SYS_VIN_MV in Power Down Sequence.
The SYS_VIN_MV of the AGX Orin Developer Kit is delayed by 100ms from SYS_VIN_HV, so the RTC time is fine. But as long as the delay of SYS_VIN_MV is lower than 50ms from SYS_VIN_HV, there will be errors. Our board SYS_VIN_MV is almost simultaneously lower than SYS_VIN_HV, so There must be something wrong.
Regarding this issue, I would like to know whether the PMIC in AGX Orin SOM has any requirements for SYS_VIN_HV and SYS_VIN_MV in Power Down Sequence. Is there any chance to avoid this error through software patches?
By the way, the power supply design of our board is none MCU.
Did you implement discharge design on VDD_SRC (HV)? That can help the power down sequence to be same to reference. There is no such SW patch as it should be guaranteed by HW design.
Ok, I’ll try it, thank you.
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