Hello, Nvidia Support team.
May I ask whether the new time sequence in the following question has been verified？
Continuing the discussion from SYS_VIN_HV / MV Sequence:
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What do you mean? The sequence has been included in DG.
Hello, in my design, 5V needs more night power than 20V to work properly.So I have this problem.
Could you please provide the latest power sequence waveform actually tested on the development board
Please follow the power on sequence as listed in Design Guide.
Hi
The current problem is that it cannot enter the system normally according to the timing sequence design in the design guide, but it can enter the system normally according to the timing sequence measured by the development board we purchased
Hi, can you share power on sequence of your board which contains all signals as listed in the sequence in DG? It is hard to understand why you said that.
Hi,
In the following pictures:
Yellow indicates the enable signal;
Purple is 5V;
Light blue is 20V;
The dark blue is PWR_BAD_L.
The following picture shows unfinished entry into the system:
The following picture shows unfinished entry into the system:
The following picture successfully enters the system:
Hi, there are no other signals like module_power_on, carrier_power_on and etc. in your waveforms.
The timing difference between 5V and 20V should not affect system power. The timing between MV and HV in DG is for safety only.
Please share whole power on sequence including other important signals and also you can share the schematic of power part for check if possible.
Hi
module_power_on is directly pulled up to 5V, and carrier_power_on is provided externally by the core board in my understanding
Hi, the power sequence in DG is validated and should be no problem. The timing between MV and HV can not affect power-on. You may need to check your custom design and the method of timing control, to find out root cause.
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