In the new Orin Design Guide on page 19 a minimum delay of 1 ms between SYS_VIN_MV and SYS_VIN_HV is mentioned. On page 24 this delay is no longer mentioned. IIs this delay necessary and will the circuit of the power button controller be adapted?
The >1ms delay is necessary.
We measured the sequence of SYS_VIN_MV (5V) and SYS_VIN_HV (19V) and on the Orin AGX Dev. Kit showing up complete invers power up sequence compared to its design guide
SYS_VIN_MV 5V is the blue graph with scale of 2Volt/Div
SYS_VIN_HV 19V is the yellow graph with scale of 20Volt/Div
Could some nvidia hw-developer confirm this behaviour?
Could some nvidia design guide writer correct this sequence description in advance?
Regards,
DJ
The current sequence in design guide is a new finding and will be updated to new devkit.
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