Hello.
I am connecting Jetson Orin NX and FPGA via PCIe, and I would like to write stream data from the FPGA to the memory of Jetson.
I would like to use DMA because I do not want to use the CPU while writing stream data.
The data from the FPGA is a stream, and since it is continuous, we plan to implement the memory area for DMA on the Jetson side as a ring buffer.
At this time, how can the CPU know the starting point of the data (the pointer where the oldest data is written) when retrieving the data?
I think one way is to manage the amount of data transferred by the FPGA, but I wonder if it is possible to read the amount of data transferred from the DMA engine on the Jetson?
For example, in section 3.4.3.1 of the Orin Series Technical Reference Manual (DP-10508-002), it says, “The number of words remaining to be transferred are in the GPCDMA_CHANNEL_CH_DMA_WORD_TRA register”
Would it be useful to read out this register?
It is similar to the existing topic in the following link, but that one did not have an answer.