Orin DDR

Can data be processed on AGX Orin while it is being transferred from FPGA via PCIe, allowing for the processing of the portion of data that has been transferred before the entire transfer is completed?

Is the frame data sending from FPGA to Orin through PCIe? Or frame data is on Orin and would like to let FPGA access it? Would like to confirm which direction is in your use-case so that we can suggest next.

Yes,the frame data send from FPGA to Orin through PCIe

There is no update from you for a period, assuming this is not an issue any more.
Hence we are closing this topic. If need further support, please open a new one.

Is this still an issue to support? Any result can be shared?