I’m looking into the specifications for Thor, but I couldn’t find clear information regarding its tensor memory which is dedicated on-chip memory for use by Tensor Cores.
Does it only use smem for 5th tensor core? Any clarification or reference to the docs would be appreciated.
Can you please add more background to your question? Like do you mean on-SoC SRAM or the DRAM? And what is the objective for the question?
According to the post, 5th generation Tensor Cores utilize Tensor Memory for computations. I asked because Jetson Thor also features these cores.
the A matrix has shape MxK, in either Tensor Memory or Shared Memory
the B matrix has shape KxN, in Shared Memory of the current CTA and optionally in peer CTA
the D matrix is of the shape MxN, in Tensor Memory