DP83867 is enabled through tegra_defconfig → REFER IMAGE-A TAG IN ATTACHED IMAGE
CONFIG_DP83867_PHY=m
We do see DP83867 as part of /sys/bus/mdio_bus/drivers/
Post flashing image, we see following on bootup console [have just copied the ethernet related logs, refer attachment (log_6MArch.log.txt) for complete log]
ifconfig shows eth0
We ascertained that driver is loaded [just tried insmod and its stated as its already in use]
orin@orin-desktop:—$ [11328.592384] Error: Driver 'TI DP83867' is already registered, aborting..
Questions
On console we see errors like these, how do we resolve this
[ 12.642162] nvethernet 2310000.ethernet: failed to read skip mac reset flag, default 0
[ 12.650317] nvethernet 2310000.ethernet: failed to read MDIO address
[ 12.663780] nvethernet 2310000.ethernet: Failed to read DMA Tx ring size, using default [1024]
[ 12.672637] nvethernet 2310000.ethernet: Failed to read DMA Tx ring size, using default [1024]
[ 12.689292] nvethernet 2310000.ethernet: Ethernet MAC address: 48:b0:2d:94:ac:db
[ 12.697342] nvethernet 2310000.ethernet: Macsec not enabled
We do not see any transaction on eth0, plus should we really expect our PHY on eth0 or eth0 is reserved for 10G the one we have should appear on eth1
We will check and revert on pinmux, probably will share the pin-mux files of ours
I think jetpack we are using is latest, shall check exact number but what we see in running image is VERSION as “ubuntu 20.04.6 LTS”
From the dts file we shared where we have mdio node with compatible string as “nvidia,eqos-mdio” we donot see the logs which indicates eqos-mdio probe function being called, any thoughts around this
You are definitely not using the latest jetpack because your kernel version is not the latest one. Ubuntu version is not kernel version. Every jetpack5 is ubuntu20.04. Not surprise to see that result.
You are not the first user enable RGMII or MGBE and as I remember ,there won’t be a extra thing called “eqos-mdio” in driver log. You can search other posts and you will find out all we are check is the pinmux.
it seems we did share the pin mux in earlier thread
Based on that thread and the question from there, I would like to state that we do not see interrupts incrementing for eth0
Shall share output of /proc/interrupts in sometime
We would like to know what is the preferred way of updating JetPack to JetPack6.
Do we need to re-flash everything or we can just update on running image.
Some ref. link would help.
Thanks
Did you upgrade the BSP version already? If it is, which is the interrupt result based on? Old release or new release? What is the dmesg in this situation?
I need to check that with my Hardware Engineer.
You mentioned some document to follow, share link for same.
Apologies if its a novice ask, i hopped on this bit later and am supporting from Linux standpoint.
Also please state what exactly you mean when you say “pinmux result looks not correct”
Would help us to debug where we went wrong.
Please also read the previous post… I don’t know who is that guy in that post but I already posted the document over there.
Looks like all of previous communication in that post is in vain…
Those registers you shared are the setting of the pinmux. Each register represents the pinmux for one pin.
And the result is not matching to what we expected from the document. That is why I said the pinmux is not correct.
If you don’t even know what does pinmux mean, then it is another long story.
:) i understand the pin-mux
In past have worked with pin-mux utility from TI for sitara processors. (AM335x,AM437x,AM63x)
Shall check the document as suggest
Thanks
I don’t really want to review your file as our document already mentioned. Please refer to document , do the update and share the register dump as my previous comment.
We continue to analyze the misses we have w.r.t pin-mux.
I spent some time to map the contents of each registers and what we observe from devmem
I am attaching this for reference here. DetailingRegisters-R1.0.pdf (82.5 KB)
As we populate the expected bits for each register, it would help if you could have a quick look and state few registers/bits in those registers which appears wrong
Thanks
-maheshG