ORIN RGMII can not work(phy 88e1512)

quanzhd · February 11, 2023, 7:12am

Hello nv team:
We designed a carrier board for Orin.The RGMII interface is used,and the PHY chip is 88E1512.
We did the following:
1 Modify the dts file to generate the dtb file,and replace the dtb file.
→ Linux_for_Tegra/kernel/dtb/tegra234-p3701-0000-p3737-0000.dtb
tegra234-p3701-0000-p3737-0000.dts (4.8 KB)

kernel_tegra234-p3701-0000-p3737-0000.dts (521.9 KB)(from dtb)
2 Generate Pinmux.dtsi and gpio.dtsi from Pinmux_Config_Template,and replace the dtsi file.

→Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000.dtsi
Orin-jetson_agx_orin-pinmux.dtsi (64.6 KB)
→Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-gpio-p3701-0000.dtsi
tegra234-mb1-bct-gpio-p3701-0000.dtsi (3.9 KB)
→Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-padvoltage-p3701-0000.dtsi
tegra234-mb1-bct-padvoltage-p3701-0000.dtsi (1.4 KB)
3 sudo ./flash.sh jetson-agx-orin-devkit mmcblk0p1
But the interface is not working.We double-checked the pinmux file but found no problems comparing Adaptation and Bringup for Jetson AGX Orin.Is there anything wrong with the dtb we modified?
Please help us,thanks.
debug-uart.log (96.8 KB)

WayneWWW · February 13, 2023, 2:41am

please follow the document. rel-35.1 document has something wrong so you should follow rel-35.2 doc.

https://docs.nvidia.com/jetson/archives/r35.2.1/DeveloperGuide/text/HR/JetsonModuleAdaptationAndBringUp/JetsonAgxOrinSeries.html?highlight=rgmii#for-rgmii

quanzhd · February 13, 2023, 3:08am

I referred to this document, $ should be 5.

I also referred to the pdf document.

I also referred to these posts.
RGMII Enabling Problem - Jetson & Embedded Systems / Jetson AGX Orin - NVIDIA Developer Forums

Jetson ORIN: RGMII can’t send data - Jetson & Embedded Systems / Jetson AGX Orin - NVIDIA Developer Forums
In contrast, I found no errors.
Is there an error with my dts file? Can you confirm this for me? Thanks!

WayneWWW · February 13, 2023, 3:19am

Hi,

The error I mean in previous comments are the pinmux typo in old document. Not device tree.

quanzhd · February 13, 2023, 3:43am

I compared the documents repeatedly.No discrepancies were found.
My pinmux.
eqos_txc_pe0 {
nvidia,pins = “eqos_txc_pe0”;
nvidia,function = “eqos”;
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};

		eqos_td0_pe1 {
			nvidia,pins = "eqos_td0_pe1";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_td1_pe2 {
			nvidia,pins = "eqos_td1_pe2";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_td2_pe3 {
			nvidia,pins = "eqos_td2_pe3";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_td3_pe4 {
			nvidia,pins = "eqos_td3_pe4";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_tx_ctl_pe5 {
			nvidia,pins = "eqos_tx_ctl_pe5";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

		eqos_rd0_pe6 {
			nvidia,pins = "eqos_rd0_pe6";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rd1_pe7 {
			nvidia,pins = "eqos_rd1_pe7";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rd2_pf0 {
			nvidia,pins = "eqos_rd2_pf0";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rd3_pf1 {
			nvidia,pins = "eqos_rd3_pf1";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rx_ctl_pf2 {
			nvidia,pins = "eqos_rx_ctl_pf2";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_rxc_pf3 {
			nvidia,pins = "eqos_rxc_pf3";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_UP>;
			nvidia,tristate = <TEGRA_PIN_ENABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_sma_mdio_pf4 {
			nvidia,pins = "eqos_sma_mdio_pf4";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_ENABLE>;
		};

		eqos_sma_mdc_pf5 {
			nvidia,pins = "eqos_sma_mdc_pf5";
			nvidia,function = "eqos";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
		};

soc_gpio17_pg4 {
nvidia,pins = “soc_gpio17_pg4”;
nvidia,function = “rsvd0”;
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};

		soc_gpio18_pg5 {
			nvidia,pins = "soc_gpio18_pg5";
			nvidia,function = "rsvd0";
			nvidia,pull = <TEGRA_PIN_PULL_NONE>;
			nvidia,tristate = <TEGRA_PIN_DISABLE>;
			nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			nvidia,lpdr = <TEGRA_PIN_DISABLE>;
		};

WayneWWW · February 13, 2023, 3:48am

Are you using 10GbE and RGMII at same time? If not, please disable 10GbE from device tree.

quanzhd · February 13, 2023, 3:58am

Yes, both are in use.And we also expanded a network port with the Intel I210.The 210 is working.

WayneWWW · February 13, 2023, 4:05am

Could you disable all the other 2 and just check RGMII functionality first? For example, not sure if you ever noticed… your RGMII and 10GbE are sharing the same mac addr.

WayneWWW · February 13, 2023, 4:06am

Also, are you sure the pinmux files and dtb really get flashed to your board…

quanzhd · February 13, 2023, 4:44am

I’m sure.DTB has changed and I checked gpio.
/sys/kernel/debug/gpio

WayneWWW · February 13, 2023, 5:06am

How about the pinmux?

quanzhd · February 13, 2023, 7:07am

How to confirm pinmux?

WayneWWW · February 13, 2023, 7:10am

Check your flash log if those files are really getting flashed.

quanzhd · February 14, 2023, 8:41am

dpkg.log (23.7 KB)
is this?
I tested MDIO and MDC.no waveform.

WayneWWW · February 14, 2023, 8:44am

No… how did you flash your jetson orin?

quanzhd · February 14, 2023, 8:53am

sudo ./flash.sh jetson-agx-orin-devkit mmcblk0p1

WayneWWW · February 14, 2023, 8:53am

Then read the log printed by flash.sh…

quanzhd · February 14, 2023, 8:58am

Okay, I’ll flash again and record the print message.

quanzhd · February 15, 2023, 3:28am

From the log I found that the dtsi file name should contain -a04，Eth1 is now recognized, but it cannot be linked and communicated.

WayneWWW · February 15, 2023, 3:33am

Does the /proc/interrupt |grep eth increase?

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ORIN RGMII can not work(phy 88e1512)

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