Ethernet interface on custom carrier board for AGX Orin 32GB

Hi NVIDIA team,

We need to use the RGMII interface on our custom carrier board for the AGX Orin 32GB.

The carried board has a Microchip KSZ9893 Ethernet Switch connected to the RGMII interface. The switch is configured via i2c (not mdio). I checked “Adaptation_and_Bringup_for_Jetson_AGX_Orin.pdf” and followed the steps to adapt the device tree, pinmux and gpios. Our custom board does not have an EEPROM.

Module: Orin32 GB Production variant “SKU 0004”
SW: JetPack-5.3.1

These are our all flashing steps:
1- Copy the attached files in the specified paths:

  • tegra234-p3701-0004-p3737-0000.dtb → Linux_for_Tegra/kernel/dtb/tegra234-p3701-0004-p3737-0000
  • tegra234-mb1-bct-pinmux-p3701-0000.dtsi → Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct-pinmux-p3701-0000.dtsi
  • tegra234-mb1-bct-gpio-p3701-0000.dtsi→ Linux_for_Tegra/bootloader/t186ref/BCT/tegra234-mb1-bct- tegra234-mb1-bct-gpio-p3701-0000.dtsi

2- Apply the binaries, apply the EEPROM configurations (we’ve not used any EEPROM) & change the ODMDATA for 1Gb Ethernet connection.

$ cd ~/nvidia/nvidia_sdk/JetPack_5.1.3_Linux_JETSON_AGX_ORIN_TARGETS/Linux_for_Tegra/
$ sudo ./apply_binaries.sh
$ sed -i "s/cvb_eeprom_read_size = <0x100>;/cvb_eeprom_read_size = <0x0>;/g" bootloader/tegra234-mb2-bct-common.dtsi
$ sed -i "s/ODMDATA=\"gbe-uphy-config-22,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0,gbe0-enable-10g\";/ODMDATA=\"gbe-uphy-config-0,nvhs-uphy-config-0,hsstp-lane-map-3,hsio-uphy-config-16\";/g" p3701.conf.common

3- Create a user to skip the Ubuntu configuration wizard.

$ sudo tools/l4t_create_default_user.sh -u nvidia -p nvidia -a -n nvidia-agx-orin --accept-license 

4- Then, flash it

$ sudo BOARDID=3701 FAB=TS4 BOARDSKU=0004 ./flash.sh -r jetson-agx-orin-devkit mmcblk0p1

5- Downloaded the kernel source code, configured the kernel to add new modules for the switch, compiled and updated the used kernel with the new modules.

The board was successfully flashed and boots normally. However, the Ethernet interface is not configured correctly. I can see from the kernel log that the Switch was found on the i2c bus, but the RGMII configuration seems to have failed. I believe the issue is that somehow the kernel is not able to read the MAC address from the EEPROM on the Orin. The strange part is the that MAC address is written to the EEPROM as can be seen from the i2c dump below. I have tried to add the /chosen nvidia,ether-mac0 node to the device tree, and also set the local-mac-address of the ethernet@6810000 interface, but that didn’t help.

What could be the problem here. Please note that I have the exact same behavior when I use the switch in MDIO mode.

NOTE: I am using a USB-to-ethernet adaptor which is seen as eth0.
Thank you for your support.

sudo dmesg | grep eth

[    9.211764] r8152 1-2.1.3:1.0 eth0: v1.11.11
[   11.521959] nvethernet 6810000.ethernet: Adding to iommu group 51
[   11.529257] nvethernet 6810000.ethernet: failed to read skip mac reset flag, default 0
[   11.538163] nvethernet 6810000.ethernet: failed to read MDIO address
[   11.545454] nvethernet 6810000.ethernet: setting to default DMA bit mask
[   11.936252] ether_get_mac_address_dtb: bad mac address at /chosen/nvidia,ether-mac0: NULL.
[   11.945638] nvethernet 6810000.ethernet: Ethernet MAC address: 48:b0:2d:d1:8b:fb
[   11.954090] nvethernet 6810000.ethernet: failed to get MAC address
[   11.963324] nvethernet: probe of 6810000.ethernet failed with error -99
[   13.974142] using random self ethernet address
[   13.980975] using random host ethernet address
[   14.603850] using random self ethernet address
[   14.609023] using random host ethernet address
[   15.845390] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready
[   15.849064] r8152 1-2.1.3:1.0 eth0: carrier on

sudo dmesg | grep KSZ

[sudo] password for nvidia: 
[ 1303.204374] ksz9477-switch 2-005f: Found KSZ9893

sudo i2cdump -y 0 0x50

No size specified (using byte-data access)
     0  1  2  3  4  5  6  7  8  9  a  b  c  d  e  f    0123456789abcdef
00: 02 00 fe 00 00 00 00 00 00 00 00 00 00 00 00 00    ?.?.............
10: 00 00 00 0a 36 39 39 2d 31 33 37 30 31 2d 30 30    ...?699-13701-00
20: 30 34 2d 35 30 30 20 4c 2e 30 00 00 00 00 00 00    04-500 L.0......
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
40: 00 00 00 00 fb 8b d1 2d b0 48 31 34 32 30 31 32    ....???-?H142012
50: 33 30 32 31 36 32 39 00 00 00 00 00 00 00 00 00    3021629.........
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
90: 00 00 00 00 00 00 4e 56 43 42 00 00 4d 31 00 00    ......NVCB..M1..
a0: 00 00 00 00 00 00 00 00 00 00 00 00 fb 8b d1 2d    ............???-
b0: b0 48 0a 00 00 00 00 00 00 00 00 00 00 00 00 00    ?H?.............
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00    ................
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1b    ...............?

ls /proc/device-tree/chosen/

board-has-eeprom  framebuffer  kaslr-seed        linux,initrd-start         linux,uefi-mmap-desc-ver  linux,uefi-mmap-start    name               nvidia,sku
bootargs          ids          linux,initrd-end  linux,uefi-mmap-desc-size  linux,uefi-mmap-size      linux,uefi-system-table  nvidia,ether-mac0

tegra234-p3701-0004-p3737-0000.dts

	chosen {
	    nvidia,ether-mac0 = [48 b0 2d d1 8b fb];
	};
	i2c@3180000 {
		status = "okay";	
		clock-frequency = <100000>;	
		KSZ9893: switch@5f {
			compatible = "microchip,KSZ9893";
			reg = <0x5f>;
			status = "okay";

			ethernet-ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					label = "lan0";
					local-mac-address = [26 cf fb 16 d7 a4];
				};
				port@1 {
					reg = <1>;
					label = "lan1";
					local-mac-address = [26 cf fb 16 d7 a5];
				};
				port@2 {
					reg = <2>;
					label = "cpu";
					ethernet = <&eth2>;
					phy-mode = "rgmii-id";

					fixed-link {
						speed = <1000>;
						full-duplex;
					};
				};
			};
		};	
	};	
	eth2: ethernet@6810000 {
		compatible = "nvidia,nvmgbe";
		status = "okay";
		nvidia,mac-addr-idx = <0>;
		nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G,5) 0>;
		nvidia,platform-mtu = <16383>;
		nvdia,pause_frames = <1>;
		phy-mode = "rgmii-id";
		local-mac-address = [48 b0 2d d1 8b fb];
		fixed-link {
			speed = <1000>;
			full-duplex;
   		};
	};

tegra234-mb1-bct-pinmux-p3701-0000.dtsi:

/*This dtsi file was generated by p3737_concord_cvm_a01.xlsm Revision: 108 */
/*
 * Copyright (c) 2021-2022, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 */

/dts-v1/;
#include "pinctrl-tegra.h"
#include "tegra234-mb1-bct-gpio-p3701-0000.dtsi"
/ {
	pinmux@2430000 {
		pinctrl-names = "default", "drive", "unused";
		pinctrl-0 = <&pinmux_default>;
		pinctrl-1 = <&drive_default>;
		pinctrl-2 = <&pinmux_unused_lowpower>;

		pinmux_default: common {
			/* SFIO Pin Configuration */
			shutdown_n {
				nvidia,pins = "shutdown_n";
				nvidia,function = "shutdown";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			batt_oc_pee3 {
				nvidia,pins = "batt_oc_pee3";
				nvidia,function = "soc";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			hdmi_cec_pgg0 {
				nvidia,pins = "hdmi_cec_pgg0";
				nvidia,function = "hdmi";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			touch_clk_pcc4 {
				nvidia,pins = "touch_clk_pcc4";
				nvidia,function = "gp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart3_tx_pcc5 {
				nvidia,pins = "uart3_tx_pcc5";
				nvidia,function = "uartc";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart3_rx_pcc6 {
				nvidia,pins = "uart3_rx_pcc6";
				nvidia,function = "uartc";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gen2_i2c_scl_pcc7 {
				nvidia,pins = "gen2_i2c_scl_pcc7";
				nvidia,function = "i2c2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gen2_i2c_sda_pdd0 {
				nvidia,pins = "gen2_i2c_sda_pdd0";
				nvidia,function = "i2c2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gen8_i2c_scl_pdd1 {
				nvidia,pins = "gen8_i2c_scl_pdd1";
				nvidia,function = "i2c8";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gen8_i2c_sda_pdd2 {
				nvidia,pins = "gen8_i2c_sda_pdd2";
				nvidia,function = "i2c8";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gp_pwm2_px2 {
				nvidia,pins = "gp_pwm2_px2";
				nvidia,function = "gp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gp_pwm3_px3 {
				nvidia,pins = "gp_pwm3_px3";
				nvidia,function = "gp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart2_tx_px4 {
				nvidia,pins = "uart2_tx_px4";
				nvidia,function = "uartb";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart2_rx_px5 {
				nvidia,pins = "uart2_rx_px5";
				nvidia,function = "uartb";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart2_rts_px6 {
				nvidia,pins = "uart2_rts_px6";
				nvidia,function = "uartb";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart2_cts_px7 {
				nvidia,pins = "uart2_cts_px7";
				nvidia,function = "uartb";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart5_tx_py5 {
				nvidia,pins = "uart5_tx_py5";
				nvidia,function = "uarti";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart5_rx_py6 {
				nvidia,pins = "uart5_rx_py6";
				nvidia,function = "uarti";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			extperiph1_clk_pp0 {
				nvidia,pins = "extperiph1_clk_pp0";
				nvidia,function = "extperiph1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			extperiph2_clk_pp1 {
				nvidia,pins = "extperiph2_clk_pp1";
				nvidia,function = "extperiph2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			cam_i2c_scl_pp2 {
				nvidia,pins = "cam_i2c_scl_pp2";
				nvidia,function = "i2c3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			cam_i2c_sda_pp3 {
				nvidia,pins = "cam_i2c_sda_pp3";
				nvidia,function = "i2c3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio24_pp5 {
				nvidia,pins = "soc_gpio24_pp5";
				nvidia,function = "soc";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pwr_i2c_scl_pp7 {
				nvidia,pins = "pwr_i2c_scl_pp7";
				nvidia,function = "i2c5";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pwr_i2c_sda_pq0 {
				nvidia,pins = "pwr_i2c_sda_pq0";
				nvidia,function = "i2c5";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio29_pq2 {
				nvidia,pins = "soc_gpio29_pq2";
				nvidia,function = "nv";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio32_pq5 {
				nvidia,pins = "soc_gpio32_pq5";
				nvidia,function = "extperiph3";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio37_pr0 {
				nvidia,pins = "soc_gpio37_pr0";
				nvidia,function = "gp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart1_tx_pr2 {
				nvidia,pins = "uart1_tx_pr2";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart1_rx_pr3 {
				nvidia,pins = "uart1_rx_pr3";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart1_rts_pr4 {
				nvidia,pins = "uart1_rts_pr4";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart1_cts_pr5 {
				nvidia,pins = "uart1_cts_pr5";
				nvidia,function = "uarta";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch0_hpd_pm0 {
				nvidia,pins = "dp_aux_ch0_hpd_pm0";
				nvidia,function = "dp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch1_hpd_pm1 {
				nvidia,pins = "dp_aux_ch1_hpd_pm1";
				nvidia,function = "eth3";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch2_hpd_pm2 {
				nvidia,pins = "dp_aux_ch2_hpd_pm2";
				nvidia,function = "eth3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch3_p_pn7 {
				nvidia,pins = "dp_aux_ch3_p_pn7";
				nvidia,function = "i2c9";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch3_n_pn0 {
				nvidia,pins = "dp_aux_ch3_n_pn0";
				nvidia,function = "i2c9";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch3_hpd_pm3 {
				nvidia,pins = "dp_aux_ch3_hpd_pm3";
				nvidia,function = "eth2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio55_pm4 {
				nvidia,pins = "soc_gpio55_pm4";
				nvidia,function = "eth2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio36_pm5 {
				nvidia,pins = "soc_gpio36_pm5";
				nvidia,function = "eth0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio53_pm6 {
				nvidia,pins = "soc_gpio53_pm6";
				nvidia,function = "eth0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio38_pm7 {
				nvidia,pins = "soc_gpio38_pm7";
				nvidia,function = "eth1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio40_pn2 {
				nvidia,pins = "soc_gpio40_pn2";
				nvidia,function = "eth1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio19_pg6 {
				nvidia,pins = "soc_gpio19_pg6";
				nvidia,function = "gp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gen1_i2c_scl_pi3 {
				nvidia,pins = "gen1_i2c_scl_pi3";
				nvidia,function = "i2c1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gen1_i2c_sda_pi4 {
				nvidia,pins = "gen1_i2c_sda_pi4";
				nvidia,function = "i2c1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio07_pi6 {
				nvidia,pins = "soc_gpio07_pi6";
				nvidia,function = "gp";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			sdmmc1_clk_pj0 {
				nvidia,pins = "sdmmc1_clk_pj0";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_cmd_pj1 {
				nvidia,pins = "sdmmc1_cmd_pj1";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat0_pj2 {
				nvidia,pins = "sdmmc1_dat0_pj2";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat1_pj3 {
				nvidia,pins = "sdmmc1_dat1_pj3";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat2_pj4 {
				nvidia,pins = "sdmmc1_dat2_pj4";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			sdmmc1_dat3_pj5 {
				nvidia,pins = "sdmmc1_dat3_pj5";
				nvidia,function = "sdmmc1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi0_sck_pc0 {
				nvidia,pins = "qspi0_sck_pc0";
				nvidia,function = "qspi0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_ENABLE>;
			};

			qspi0_cs_n_pc1 {
				nvidia,pins = "qspi0_cs_n_pc1";
				nvidia,function = "qspi0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			qspi0_io0_pc2 {
				nvidia,pins = "qspi0_io0_pc2";
				nvidia,function = "qspi0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi0_io1_pc3 {
				nvidia,pins = "qspi0_io1_pc3";
				nvidia,function = "qspi0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi0_io2_pc4 {
				nvidia,pins = "qspi0_io2_pc4";
				nvidia,function = "qspi0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			qspi0_io3_pc5 {
				nvidia,pins = "qspi0_io3_pc5";
				nvidia,function = "qspi0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_txc_pe0 {
				nvidia,pins = "eqos_txc_pe0";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td0_pe1 {
				nvidia,pins = "eqos_td0_pe1";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td1_pe2 {
				nvidia,pins = "eqos_td1_pe2";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td2_pe3 {
				nvidia,pins = "eqos_td2_pe3";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_td3_pe4 {
				nvidia,pins = "eqos_td3_pe4";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_tx_ctl_pe5 {
				nvidia,pins = "eqos_tx_ctl_pe5";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			eqos_rd0_pe6 {
				nvidia,pins = "eqos_rd0_pe6";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rd1_pe7 {
				nvidia,pins = "eqos_rd1_pe7";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rd2_pf0 {
				nvidia,pins = "eqos_rd2_pf0";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rd3_pf1 {
				nvidia,pins = "eqos_rd3_pf1";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rx_ctl_pf2 {
				nvidia,pins = "eqos_rx_ctl_pf2";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_rxc_pf3 {
				nvidia,pins = "eqos_rxc_pf3";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_sma_mdio_pf4 {
				nvidia,pins = "eqos_sma_mdio_pf4";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			eqos_sma_mdc_pf5 {
				nvidia,pins = "eqos_sma_mdc_pf5";
				nvidia,function = "eqos";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio59_pac6 {
				nvidia,pins = "soc_gpio59_pac6";
				nvidia,function = "aud";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio45_pad0 {
				nvidia,pins = "soc_gpio45_pad0";
				nvidia,function = "i2s1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio46_pad1 {
				nvidia,pins = "soc_gpio46_pad1";
				nvidia,function = "i2s1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio47_pad2 {
				nvidia,pins = "soc_gpio47_pad2";
				nvidia,function = "i2s1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio48_pad3 {
				nvidia,pins = "soc_gpio48_pad3";
				nvidia,function = "i2s1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			ufs0_ref_clk_pae0 {
				nvidia,pins = "ufs0_ref_clk_pae0";
				nvidia,function = "ufs0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			ufs0_rst_n_pae1 {
				nvidia,pins = "ufs0_rst_n_pae1";
				nvidia,function = "ufs0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			pex_l1_clkreq_n_pk2 {
				nvidia,pins = "pex_l1_clkreq_n_pk2";
				nvidia,function = "pe1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l1_rst_n_pk3 {
				nvidia,pins = "pex_l1_rst_n_pk3";
				nvidia,function = "pe1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l4_clkreq_n_pl0 {
				nvidia,pins = "pex_l4_clkreq_n_pl0";
				nvidia,function = "pe4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l4_rst_n_pl1 {
				nvidia,pins = "pex_l4_rst_n_pl1";
				nvidia,function = "pe4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart7_tx_pu1 {
				nvidia,pins = "uart7_tx_pu1";
				nvidia,function = "uartg";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart7_rx_pu2 {
				nvidia,pins = "uart7_rx_pu2";
				nvidia,function = "uartg";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap4_sclk_pa4 {
				nvidia,pins = "dap4_sclk_pa4";
				nvidia,function = "i2s4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap4_dout_pa5 {
				nvidia,pins = "dap4_dout_pa5";
				nvidia,function = "i2s4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap4_din_pa6 {
				nvidia,pins = "dap4_din_pa6";
				nvidia,function = "i2s4";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap4_fs_pa7 {
				nvidia,pins = "dap4_fs_pa7";
				nvidia,function = "i2s4";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l5_clkreq_n_paf0 {
				nvidia,pins = "pex_l5_clkreq_n_paf0";
				nvidia,function = "pe5";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l5_rst_n_paf1 {
				nvidia,pins = "pex_l5_rst_n_paf1";
				nvidia,function = "pe5";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			emmc_clk {
				nvidia,pins = "emmc_clk";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_ENABLE>;
			};

			emmc_cmd {
				nvidia,pins = "emmc_cmd";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat0 {
				nvidia,pins = "emmc_dat0";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat1 {
				nvidia,pins = "emmc_dat1";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat2 {
				nvidia,pins = "emmc_dat2";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat3 {
				nvidia,pins = "emmc_dat3";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat4 {
				nvidia,pins = "emmc_dat4";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat5 {
				nvidia,pins = "emmc_dat5";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat6 {
				nvidia,pins = "emmc_dat6";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dat7 {
				nvidia,pins = "emmc_dat7";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,loopback = <TEGRA_PIN_DISABLE>;
			};

			emmc_dqs {
				nvidia,pins = "emmc_dqs";
				nvidia,function = "emmc";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			/* GPIO Pin Configuration */
			soc_gpio26_pee5 {
				nvidia,pins = "soc_gpio26_pee5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio27_pee6 {
				nvidia,pins = "soc_gpio27_pee6";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			ao_retention_n_pee2 {
				nvidia,pins = "ao_retention_n_pee2";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			power_on_pee4 {
				nvidia,pins = "power_on_pee4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi2_sck_pcc0 {
				nvidia,pins = "spi2_sck_pcc0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi2_miso_pcc1 {
				nvidia,pins = "spi2_miso_pcc1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi2_mosi_pcc2 {
				nvidia,pins = "spi2_mosi_pcc2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi2_cs0_pcc3 {
				nvidia,pins = "spi2_cs0_pcc3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			can0_dout_paa0 {
				nvidia,pins = "can0_dout_paa0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			can0_din_paa1 {
				nvidia,pins = "can0_din_paa1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			can1_dout_paa2 {
				nvidia,pins = "can1_dout_paa2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			can1_din_paa3 {
				nvidia,pins = "can1_din_paa3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			can0_stb_paa4 {
				nvidia,pins = "can0_stb_paa4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can0_err_paa7 {
				nvidia,pins = "can0_err_paa7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			can1_stb_pbb0 {
				nvidia,pins = "can1_stb_pbb0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			can1_en_pbb1 {
				nvidia,pins = "can1_en_pbb1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			soc_gpio50_pbb2 {
				nvidia,pins = "soc_gpio50_pbb2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};

			can1_err_pbb3 {
				nvidia,pins = "can1_err_pbb3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio08_pb0 {
				nvidia,pins = "soc_gpio08_pb0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			gpu_pwr_req_px0 {
				nvidia,pins = "gpu_pwr_req_px0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			cv_pwr_req_px1 {
				nvidia,pins = "cv_pwr_req_px1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi3_sck_py0 {
				nvidia,pins = "spi3_sck_py0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi3_miso_py1 {
				nvidia,pins = "spi3_miso_py1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi3_mosi_py2 {
				nvidia,pins = "spi3_mosi_py2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi3_cs0_py3 {
				nvidia,pins = "spi3_cs0_py3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi3_cs1_py4 {
				nvidia,pins = "spi3_cs1_py4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart5_rts_py7 {
				nvidia,pins = "uart5_rts_py7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart5_cts_pz0 {
				nvidia,pins = "uart5_cts_pz0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			usb_vbus_en0_pz1 {
				nvidia,pins = "usb_vbus_en0_pz1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			usb_vbus_en1_pz2 {
				nvidia,pins = "usb_vbus_en1_pz2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_sck_pz3 {
				nvidia,pins = "spi1_sck_pz3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_miso_pz4 {
				nvidia,pins = "spi1_miso_pz4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_mosi_pz5 {
				nvidia,pins = "spi1_mosi_pz5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_cs0_pz6 {
				nvidia,pins = "spi1_cs0_pz6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi1_cs1_pz7 {
				nvidia,pins = "spi1_cs1_pz7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio23_pp4 {
				nvidia,pins = "soc_gpio23_pp4";
				nvidia,function = "vi0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio25_pp6 {
				nvidia,pins = "soc_gpio25_pp6";
				nvidia,function = "vi0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio28_pq1 {
				nvidia,pins = "soc_gpio28_pq1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio31_pq4 {
				nvidia,pins = "soc_gpio31_pq4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio33_pq6 {
				nvidia,pins = "soc_gpio33_pq6";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio35_pq7 {
				nvidia,pins = "soc_gpio35_pq7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio56_pr1 {
				nvidia,pins = "soc_gpio56_pr1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch1_p_pn3 {
				nvidia,pins = "dp_aux_ch1_p_pn3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch1_n_pn4 {
				nvidia,pins = "dp_aux_ch1_n_pn4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio39_pn1 {
				nvidia,pins = "soc_gpio39_pn1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio13_pg0 {
				nvidia,pins = "soc_gpio13_pg0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio15_pg2 {
				nvidia,pins = "soc_gpio15_pg2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio16_pg3 {
				nvidia,pins = "soc_gpio16_pg3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio17_pg4 {
				nvidia,pins = "soc_gpio17_pg4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio18_pg5 {
				nvidia,pins = "soc_gpio18_pg5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio20_pg7 {
				nvidia,pins = "soc_gpio20_pg7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio21_ph0 {
				nvidia,pins = "soc_gpio21_ph0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio22_ph1 {
				nvidia,pins = "soc_gpio22_ph1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart4_tx_ph3 {
				nvidia,pins = "uart4_tx_ph3";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart4_rx_ph4 {
				nvidia,pins = "uart4_rx_ph4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart4_rts_ph5 {
				nvidia,pins = "uart4_rts_ph5";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			uart4_cts_ph6 {
				nvidia,pins = "uart4_cts_ph6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio41_ph7 {
				nvidia,pins = "soc_gpio41_ph7";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio42_pi0 {
				nvidia,pins = "soc_gpio42_pi0";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio43_pi1 {
				nvidia,pins = "soc_gpio43_pi1";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio44_pi2 {
				nvidia,pins = "soc_gpio44_pi2";
				nvidia,function = "rsvd2";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			cpu_pwr_req_pi5 {
				nvidia,pins = "cpu_pwr_req_pi5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi5_sck_pac0 {
				nvidia,pins = "spi5_sck_pac0";
				nvidia,function = "rsvd3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi5_miso_pac1 {
				nvidia,pins = "spi5_miso_pac1";
				nvidia,function = "rsvd3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi5_mosi_pac2 {
				nvidia,pins = "spi5_mosi_pac2";
				nvidia,function = "rsvd3";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi5_cs0_pac3 {
				nvidia,pins = "spi5_cs0_pac3";
				nvidia,function = "rsvd3";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio57_pac4 {
				nvidia,pins = "soc_gpio57_pac4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio58_pac5 {
				nvidia,pins = "soc_gpio58_pac5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_UP>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio60_pac7 {
				nvidia,pins = "soc_gpio60_pac7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l0_clkreq_n_pk0 {
				nvidia,pins = "pex_l0_clkreq_n_pk0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l0_rst_n_pk1 {
				nvidia,pins = "pex_l0_rst_n_pk1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l2_clkreq_n_pk4 {
				nvidia,pins = "pex_l2_clkreq_n_pk4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l2_rst_n_pk5 {
				nvidia,pins = "pex_l2_rst_n_pk5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l3_clkreq_n_pk6 {
				nvidia,pins = "pex_l3_clkreq_n_pk6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l3_rst_n_pk7 {
				nvidia,pins = "pex_l3_rst_n_pk7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_wake_n_pl2 {
				nvidia,pins = "pex_wake_n_pl2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio34_pl3 {
				nvidia,pins = "soc_gpio34_pl3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l7_clkreq_n_pag0 {
				nvidia,pins = "pex_l7_clkreq_n_pag0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l7_rst_n_pag1 {
				nvidia,pins = "pex_l7_rst_n_pag1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l8_clkreq_n_pag2 {
				nvidia,pins = "pex_l8_clkreq_n_pag2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l8_rst_n_pag3 {
				nvidia,pins = "pex_l8_rst_n_pag3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l9_clkreq_n_pag4 {
				nvidia,pins = "pex_l9_clkreq_n_pag4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l9_rst_n_pag5 {
				nvidia,pins = "pex_l9_rst_n_pag5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l10_clkreq_n_pag6 {
				nvidia,pins = "pex_l10_clkreq_n_pag6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l10_rst_n_pag7 {
				nvidia,pins = "pex_l10_rst_n_pag7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap6_sclk_pa0 {
				nvidia,pins = "dap6_sclk_pa0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap6_dout_pa1 {
				nvidia,pins = "dap6_dout_pa1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap6_din_pa2 {
				nvidia,pins = "dap6_din_pa2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dap6_fs_pa3 {
				nvidia,pins = "dap6_fs_pa3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l6_clkreq_n_paf2 {
				nvidia,pins = "pex_l6_clkreq_n_paf2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			pex_l6_rst_n_paf3 {
				nvidia,pins = "pex_l6_rst_n_paf3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_ENABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};
		};

		pinmux_unused_lowpower: unused_lowpower {
			sce_error_pee0 {
				nvidia,pins = "sce_error_pee0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			vcomp_alert_pee1 {
				nvidia,pins = "vcomp_alert_pee1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			bootv_ctl_n_pee7 {
				nvidia,pins = "bootv_ctl_n_pee7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			can0_en_paa5 {
				nvidia,pins = "can0_en_paa5";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio49_paa6 {
				nvidia,pins = "soc_gpio49_paa6";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio30_pq3 {
				nvidia,pins = "soc_gpio30_pq3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch2_p_pn5 {
				nvidia,pins = "dp_aux_ch2_p_pn5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			dp_aux_ch2_n_pn6 {
				nvidia,pins = "dp_aux_ch2_n_pn6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio14_pg1 {
				nvidia,pins = "soc_gpio14_pg1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio06_ph2 {
				nvidia,pins = "soc_gpio06_ph2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			qspi1_sck_pc6 {
				nvidia,pins = "qspi1_sck_pc6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,loopback = <TEGRA_PIN_ENABLE>;
			};

			qspi1_cs_n_pc7 {
				nvidia,pins = "qspi1_cs_n_pc7";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			qspi1_io0_pd0 {
				nvidia,pins = "qspi1_io0_pd0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			qspi1_io1_pd1 {
				nvidia,pins = "qspi1_io1_pd1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			qspi1_io2_pd2 {
				nvidia,pins = "qspi1_io2_pd2";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			qspi1_io3_pd3 {
				nvidia,pins = "qspi1_io3_pd3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can2_dout_ps0 {
				nvidia,pins = "can2_dout_ps0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can2_din_ps1 {
				nvidia,pins = "can2_din_ps1";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can2_stb_ps2 {
				nvidia,pins = "can2_stb_ps2";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can2_en_ps3 {
				nvidia,pins = "can2_en_ps3";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can2_err_ps4 {
				nvidia,pins = "can2_err_ps4";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can3_dout_ps5 {
				nvidia,pins = "can3_dout_ps5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can3_din_ps6 {
				nvidia,pins = "can3_din_ps6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can3_stb_ps7 {
				nvidia,pins = "can3_stb_ps7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can3_en_pt0 {
				nvidia,pins = "can3_en_pt0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			can3_err_pt1 {
				nvidia,pins = "can3_err_pt1";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};

			soc_error_pu0 {
				nvidia,pins = "soc_error_pu0";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi7_sck_pu3 {
				nvidia,pins = "spi7_sck_pu3";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi7_miso_pu4 {
				nvidia,pins = "spi7_miso_pu4";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi7_mosi_pu5 {
				nvidia,pins = "spi7_mosi_pu5";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			spi7_cs0_pu6 {
				nvidia,pins = "spi7_cs0_pu6";
				nvidia,function = "rsvd1";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio51_pu7 {
				nvidia,pins = "soc_gpio51_pu7";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio52_pv0 {
				nvidia,pins = "soc_gpio52_pv0";
				nvidia,function = "rsvd0";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio61_pw0 {
				nvidia,pins = "soc_gpio61_pw0";
				nvidia,function = "rsvd3";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};

			soc_gpio62_pw1 {
				nvidia,pins = "soc_gpio62_pw1";
				nvidia,function = "rsvd3";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
				nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
				nvidia,lpdr = <TEGRA_PIN_DISABLE>;
			};
		};

		drive_default: drive {
		};
	};
};

tegra234-mb1-bct-gpio-p3701-0000.dtsi

/*This dtsi file was generated by p3737_concord_cvm_a01.xlsm Revision: 108 */
/*
 * Copyright (c) 2021-2022, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 */

#include "tegra234-gpio.h"


/ {
	gpio@2200000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_main_default>;

		gpio_main_default: default {
			gpio-input = <
				TEGRA234_MAIN_GPIO(B, 0)
				TEGRA234_MAIN_GPIO(Y, 3)
				TEGRA234_MAIN_GPIO(Y, 7)
				TEGRA234_MAIN_GPIO(Z, 1)
				TEGRA234_MAIN_GPIO(Z, 3)
				TEGRA234_MAIN_GPIO(Z, 4)
				TEGRA234_MAIN_GPIO(Z, 5)
				TEGRA234_MAIN_GPIO(Z, 6)
				TEGRA234_MAIN_GPIO(Z, 7)
				TEGRA234_MAIN_GPIO(P, 4)
				TEGRA234_MAIN_GPIO(P, 6)
				TEGRA234_MAIN_GPIO(Q, 6)
				TEGRA234_MAIN_GPIO(Q, 7)
				TEGRA234_MAIN_GPIO(R, 1)
				TEGRA234_MAIN_GPIO(N, 4)
				TEGRA234_MAIN_GPIO(N, 1)
				TEGRA234_MAIN_GPIO(G, 0)
				TEGRA234_MAIN_GPIO(G, 1)
				TEGRA234_MAIN_GPIO(G, 2)
				TEGRA234_MAIN_GPIO(G, 4)
				TEGRA234_MAIN_GPIO(G, 5)
				TEGRA234_MAIN_GPIO(G, 7)
				TEGRA234_MAIN_GPIO(H, 0)
				TEGRA234_MAIN_GPIO(H, 5)
				TEGRA234_MAIN_GPIO(H, 7)
				TEGRA234_MAIN_GPIO(I, 0)
				TEGRA234_MAIN_GPIO(I, 1)
				TEGRA234_MAIN_GPIO(I, 2)
				TEGRA234_MAIN_GPIO(AC, 3)
				TEGRA234_MAIN_GPIO(AC, 4)
				TEGRA234_MAIN_GPIO(AC, 5)
				TEGRA234_MAIN_GPIO(K, 0)
				TEGRA234_MAIN_GPIO(K, 1)
				TEGRA234_MAIN_GPIO(K, 6)
				TEGRA234_MAIN_GPIO(K, 7)
				TEGRA234_MAIN_GPIO(L, 2)
				TEGRA234_MAIN_GPIO(L, 3)
				TEGRA234_MAIN_GPIO(AG, 0)
				TEGRA234_MAIN_GPIO(AG, 1)
				TEGRA234_MAIN_GPIO(AG, 2)
				TEGRA234_MAIN_GPIO(AG, 3)
				TEGRA234_MAIN_GPIO(AG, 6)
				TEGRA234_MAIN_GPIO(AG, 7)
				TEGRA234_MAIN_GPIO(AF, 2)
				TEGRA234_MAIN_GPIO(AF, 3)
				>;
			gpio-output-low = <
				TEGRA234_MAIN_GPIO(X, 0)
				TEGRA234_MAIN_GPIO(X, 1)
				TEGRA234_MAIN_GPIO(Z, 2)
				TEGRA234_MAIN_GPIO(N, 3)
				TEGRA234_MAIN_GPIO(H, 1)
				TEGRA234_MAIN_GPIO(H, 3)
				TEGRA234_MAIN_GPIO(H, 4)
				TEGRA234_MAIN_GPIO(H, 6)
				TEGRA234_MAIN_GPIO(I, 5)
				TEGRA234_MAIN_GPIO(AC, 0)
				TEGRA234_MAIN_GPIO(AC, 1)
				TEGRA234_MAIN_GPIO(AC, 2)
				TEGRA234_MAIN_GPIO(A, 1)
				TEGRA234_MAIN_GPIO(A, 2)
				>;
			gpio-output-high = <
				TEGRA234_MAIN_GPIO(Y, 0)
				TEGRA234_MAIN_GPIO(Y, 1)
				TEGRA234_MAIN_GPIO(Y, 2)
				TEGRA234_MAIN_GPIO(Y, 4)
				TEGRA234_MAIN_GPIO(Z, 0)
				TEGRA234_MAIN_GPIO(Q, 1)
				TEGRA234_MAIN_GPIO(G, 3)
				TEGRA234_MAIN_GPIO(AC, 7)
				TEGRA234_MAIN_GPIO(K, 4)
				TEGRA234_MAIN_GPIO(K, 5)
				TEGRA234_MAIN_GPIO(AG, 4)
				TEGRA234_MAIN_GPIO(AG, 5)
				TEGRA234_MAIN_GPIO(A, 0)
				TEGRA234_MAIN_GPIO(A, 3)
				>;
		};
	};
	gpio@c2f0000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_aon_default>;

		gpio_aon_default: default {
			gpio-input = <
				TEGRA234_AON_GPIO(EE, 5)
				TEGRA234_AON_GPIO(EE, 6)
				TEGRA234_AON_GPIO(EE, 2)
				TEGRA234_AON_GPIO(EE, 4)
				TEGRA234_AON_GPIO(CC, 0)
				TEGRA234_AON_GPIO(CC, 1)
				TEGRA234_AON_GPIO(AA, 0)
				TEGRA234_AON_GPIO(AA, 1)
				TEGRA234_AON_GPIO(AA, 2)
				TEGRA234_AON_GPIO(AA, 3)
				TEGRA234_AON_GPIO(AA, 7)
				TEGRA234_AON_GPIO(BB, 0)
				TEGRA234_AON_GPIO(BB, 1)
				TEGRA234_AON_GPIO(BB, 2)
				>;
			gpio-output-low = <
				TEGRA234_AON_GPIO(CC, 2)
				TEGRA234_AON_GPIO(CC, 3)
				TEGRA234_AON_GPIO(AA, 4)
				>;
			gpio-output-high = <
				TEGRA234_AON_GPIO(BB, 3)
				>;
		};
	};
	gpio@9250000 {
		gpio-init-names = "default";
		gpio-init-0 = <&gpio_fsi_default>;

		gpio_fsi_default: default {
			gpio-input = <
				>;
			gpio-output-low = <
				>;
			gpio-output-high = <
				>;
		};
	};

};

some mistakes

  1. 4- Then, flash it
    $ sudo BOARDID=3701 FAB=TS4 BOARDSKU=0004 ./flash.sh -r jetson-agx-orin-devkit mmcblk0p1

Please do not use this. Just sudo ./flash.sh jetson-agx-orin-devkit mmcblk0p1

  1. Device tree is wrong too. 6810000.ethernet is for MGBE but not RGMII… Please read the document again.

Hi @WayneWWW

Thank you for your prompt reply.

4- Then, flash it
$ sudo BOARDID=3701 FAB=TS4 BOARDSKU=0004 ./flash.sh -r jetson-agx-orin-devkit mmcblk0p1
Please do not use this. Just sudo ./flash.sh jetson-agx-orin-devkit mmcblk0p1

If i use the script without any arguments, the wrong device tree file gets installed. The tegra234-p3701-0000-p3737-0000.dtb gets installed instead of the tegra234-p3701-0004-p3737-0000.dtb. The module I am working with has the number 900-13701-0040-000 with serial number 1420123021843. Is this SKU 0004 or SKU 0000 module? Could be that for some reason the module doesn’t get detected correctly ? I am flashing it on our custom carrier board, which in my opinion should not cause such issue since the EEPROM is on the module, not the carrier board. Or am i missing something here?

flash log.txt (188.7 KB)

Thank you

The flash process always uses the EEPROM on the module to read which kind of module you are using…

Thus, if the flash tool let you to use tegra234-p3701-0000-p3737-0000, it means your module is sku0 one but not sku4 one.

If you ever corrupted your EEPROM, then the flash won’t even happen. Thus, I think you are just using sku0 module.

if you have a look at the flash log file attached above, you can find these lines:

Board ID(3701) version(500) sku(0004) revision(L.0)
Chip SKU(00:00:00:D2) ramcode(00:00:00:00) fuselevel(fuselevel_production) board_FAB(500)
Copy /home/gl/nvidia/nvidia_sdk/JetPack_5.1.3_Linux_JETSON_AGX_ORIN_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3701-0004-p3737-0000.dtb to /home/gl/nvidia/nvidia_sdk/JetPack_5.1.3_Linux_JETSON_AGX_ORIN_TARGETS/Linux_for_Tegra/kernel/dtb/tegra234-p3701-0004-p3737-0000.dtb.rec

it doesnt make sense why the SKU0 device tree is found/flashed on the module

What is your method to tell your device tree in use is tegra234-p3701-0000-p3737-0000.dtb when above log already told it chose sku4 device tree?

first, after booting the extlinux.conf file uses the kernel_tegra234-p3701-0000-p3737-0000.dtb.

Also, i modified the device tree model node, but :

cat /proc/device-tree/model give the default model name.

and the correct tegra234-p3701-0004-p3737-0000.dtb file doesn’t exist on the module.

Based on my experience… are you sure your device is booting from the emmc right now but not other storage…?

I am certain. There are no other storage devices connected

You keep using “-r” in your flash command. Are you sure this does not affect your rootfs?

If previous system.img is using sku0 dtb, then with -r, you will only get another sku0 dtb in rootfs.

1 Like

I completely missed that. Thank you for pointing it out.

Hi @WayneWWW

I have reverted to Jetpack 5.1.2 instead of 1.5.3. I have updated the device tree to use the rgmii interface instead of the mgbe, repeated the same steps in my initial post, then flashed the module using ./flash.sh jetson-agx-orin-devkit mmcblk0p1. The flashing was successful and the board boots. But now i have different issues with the rgmii interface :

sudo dmesg | grep eth

[   11.820487] nvethernet 2310000.ethernet: Adding to iommu group 51
[   11.860047] nvethernet 2310000.ethernet: failed to read skip mac reset flag, default 0
[   11.868834] nvethernet 2310000.ethernet: failed to read MDIO address
[   11.876003] nvethernet 2310000.ethernet: setting to default DMA bit mask
[   11.883532] nvethernet 2310000.ethernet: missing nvidia,pad_auto_cal_pu_offset, setting default 0
[   11.893284] nvethernet 2310000.ethernet: missing nvidia,pad_auto_cal_pd_offset, setting default 0
[   11.912376] nvethernet 2310000.ethernet: Ethernet MAC address: 48:b0:2d:d1:8b:fb
[   11.920954] nvethernet 2310000.ethernet: macsec param in DT is missing or disabled
[   11.929365] nvethernet 2310000.ethernet: Macsec not supported/Not enabled in DT
[   11.938801] nvethernet 2310000.ethernet: EQOS (HW ver: 53) created with 8 DMA channels
[   12.374293] r8152 1-2.1.3:1.0 eth0: v1.11.11
[   13.846267] using random self ethernet address
[   13.859962] using random host ethernet address
[   14.580250] using random self ethernet address
[   14.585469] using random host ethernet address
[   16.569072] nvethernet 2310000.ethernet: [poll_check][42][type:0x4][loga-0x0] poll_check: timeout

seems like the issue is probably with the reset gpio. How can i verify if the pinmux is applied ?

kernel_tegra234-p3701-0004-p3737-0000.dts

	ethernet@2310000 {
		compatible = "nvidia,nveqos";
		reg = <0x00 0x2310000 0x00 0x10000 0x00 0x23d0000 0x00 0x10000 0x00 0x2300000 0x00 0x10000>;
		reg-names = "mac\0macsec-base\0hypervisor";
		interrupts = <0x00 0xc2 0x04 0x00 0xba 0x04 0x00 0xbb 0x04 0x00 0xbc 0x04 0x00 0xbd 0x04 0x00 0xbe 0x04 0x00 0xbf 0x04>;
		interrupt-names = "common\0vm0\0vm1\0vm2\0vm3\0macsec-ns-irq\0macsec-s-irq";
		resets = <0x02 0x11 0x02 0x16>;
		reset-names = "mac\0macsec_ns_rst";
		clocks = <0x02 0x120 0x02 0x20 0x02 0x22 0x02 0x21 0x02 0x23 0x02 0x08 0x02 0x46 0x02 0x17 0x02 0x19e 0x02 0x19f 0x02 0x19d>;
		clock-names = "pllrefe_vcoout\0eqos_axi\0eqos_rx\0eqos_ptp_ref\0eqos_tx\0axi_cbb\0eqos_rx_m\0eqos_rx_input\0eqos_macsec_tx\0eqos_tx_divider\0eqos_macsec_rx";
		interconnects = <0x44 0x8e 0x44 0x8f>;
		interconnect-names = "dma-mem\0write";
		iommus = <0x21 0x03>;
		nvidia,num-dma-chans = <0x08>;
		nvidia,num-mtl-queues = <0x08>;
		nvidia,mtl-queues = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
		nvidia,dma-chans = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
		nvidia,tc-mapping = <0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07>;
		nvidia,residual-queue = <0x01>;
		nvidia,rx-queue-prio = <0x02 0x01 0x30 0x48 0x00 0x00 0x00 0x00>;
		nvidia,tx-queue-prio = <0x00 0x07 0x02 0x03 0x00 0x00 0x00 0x00>;
		nvidia,rxq_enable_ctrl = <0x02 0x02 0x02 0x02 0x02 0x02 0x02 0x02>;
		nvidia,vm-irq-config = <0x4a>;
		status = "okay";
		nvidia,dcs-enable = <0x01>;
		nvidia,pad_calibration = <0x01>;
		nvidia,rx_riwt = <0x200>;
		nvidia,rx_frames = <0x40>;
		nvidia,tx_usecs = <0x100>;
		nvidia,tx_frames = <0x05>;
		nvidia,promisc_mode = <0x01>;
		nvidia,slot_num_check = <0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00>;
		nvidia,slot_intvl_vals = <0x00 0x7d 0x7d 0x7d 0x7d 0x7d 0x7d 0x7d>;
		nvidia,ptp_ref_clock_speed = <0xc6aea16>;
		nvidia,instance_id = <0x04>;
		nvidia,ptp-rx-queue = <0x03>;
		pinctrl-names = "mii_rx_disable\0mii_rx_enable";
		pinctrl-0 = <0x4b>;
		pinctrl-1 = <0x4c>;
		dma-coherent;
		nvidia,dma_rx_ring_sz = <0x400>;
		nvidia,dma_tx_ring_sz = <0x400>;
		vddio_sys_enet_bias-supply = <0x0a>;
		vddio_enet-supply = <0x0a>;
		phy_vdd_1v8-supply = <0x36>;
		phy_ovdd_rgmii-supply = <0x36>;
		phy_pllvdd-supply = <0x0a>;

	        nvidia,if-name = "EQOS";
		nvidia,mac-addr-idx = <0x0>;
		nvidia,pause_frames = <0x0>;
		local-mac-address = [1a 2b 3c 4d 5e 6f];
		nvidia,phy-reset-gpio = <0x04 0x35 0x00>;
		phy-mode = "rgmii-id";
		nvidia,max-platform-mtu = <0x3fff>;
	};

If this is a switch, then the only thing needed there is just the fixed-link things.

The rest of requirement depends on the switch vendor.

It is a switch, connected directly to the RMGII interface of the Orin. Do you mean that I should not worry about any of the configurations mentioned in the Adaptation_and_Bringup_for_Jetson_AGX_Orin.pdf document for the RGMII configuration ?

Switch is an external entity correct which is out of nvidia scope. Thus you may need to contact the switch vendor for the same.

From Nvidia side when mgbe or RGMII is connected to switch then treat that as a fixed link and operate at the speed listed in the DT node. Other configurations are uncertain.

Ok i understand your point. I have one more question about NVIDIA’s side of the configuration. When I add the phy reset gpio to the device tree:

nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 5) 0>;

I can see that after booting, the reset goes low and the switch goes to a reset mode, but for some reason the reset never goes high again, and therefore the switch stays in reset. Any idea why this is happening ?

when I restart NetworkManger, i get the following errors and the reset toggles to high, then low and stays low:

[   85.431189] net eth1: failed to poll MAC Software reset
[   89.478546] nvethernet 2310000.ethernet eth1: ether_get_wol: phydev is null check iface up status
[   90.612442] nvethernet 2310000.ethernet: [poll_check][42][type:0x4][loga-0x0] poll_check: timeout
[   90.621600] net eth1: failed to poll MAC Software reset
sudo dmesg | grep eth
[    0.000000] psci: probing for conduit method from DT.
[    4.332808] usbcore: registered new interface driver cdc_ether
[    6.104137] optee: probing for conduit method.
[   10.233637] r8152 1-2.1.3:1.0 eth0: v1.11.11
[   11.920591] nvethernet 2310000.ethernet: Adding to iommu group 51
[   11.927801] nvethernet 2310000.ethernet: failed to read skip mac reset flag, default 0
[   11.936766] nvethernet 2310000.ethernet: failed to read MDIO address
[   11.944100] nvethernet 2310000.ethernet: Failed to read nvida,pause_frames, so setting to default support as disable
[   11.955723] nvethernet 2310000.ethernet: setting to default DMA bit mask
[   11.965125] nvethernet 2310000.ethernet: missing nvidia,pad_auto_cal_pu_offset, setting default 0
[   11.975029] nvethernet 2310000.ethernet: missing nvidia,pad_auto_cal_pd_offset, setting default 0
[   11.996930] nvethernet 2310000.ethernet: Ethernet MAC index missing
[   12.004183] nvethernet 2310000.ethernet: Ethernet MAC address: 48:b0:2d:d1:8b:fb
[   12.012893] nvethernet 2310000.ethernet: macsec param in DT is missing or disabled
[   12.021416] nvethernet 2310000.ethernet: Macsec not supported/Not enabled in DT
[   12.030941] nvethernet 2310000.ethernet: eth1 (HW ver: 53) created with 8 DMA channels
[   13.948525] using random self ethernet address
[   13.955540] using random host ethernet address
[   14.673756] using random self ethernet address
[   14.678952] using random host ethernet address
[   16.701776] nvethernet 2310000.ethernet: [poll_check][42][type:0x4][loga-0x0] poll_check: timeout
[   16.711488] net eth1: failed to poll MAC Software reset

We only expect the reset pin would get toggled in RGMII+ PHY case. We are not sure about the behavior for RGMII+ switch.

Make sure this pin has the correct pinmux as the document mentioned.

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