I am working on a custom baseboard with a Marvell 88E1512 PHY and I am trying to get it working with AGX Orin. I was following the adaption guide (device enabled ethernet@2310000, custom pinmux, disabled MGBE using ODMDATA).
My implementation was working with JP 5.0.1DP, but not anymore with JP 5.0.2GA. See my post here:
I had put it aside for a while, but now I need to finally solve it. I tried again with JP 5.1.0 and I still see the same problem. I do see eth0 with the correct MAC address and link negotiation. ifconfig also reports some rx and tx packets, but the communication doesn’t actually work. (e.g. DHCP, no ARP neighbors, etc…)
tcpdump suggests that inbound packets at least partially are working.
I found that ethtool -t eth0 also reports a PHY loopback error:
The test result is FAIL
The test extra info:
1. MAC Loopback 0
2. PHY Loopback -110
3. MMC Counters 0
Altough @WayneWWW wrote in my previous post, that nothing changed between 5.0.1DP and 5.0.2, I do see different configuration for the DMA interconnects. (e.g. interconnects, interconnect-names entries). I can provide the device-tree dump from 5.0.1DP if that helps.
I tried also with the AGX Xavier, and it is working fine with JP 5.1.0 on the same hardware. Thus it works with Xavier on 5.1.0 and Orin on JP 5.0.1DP, but not with Orin JP 5.1.0.
Device-Tree overlay to add RGMII Ethernet. (Overlay does get applied, see device tree dump later):
/* Disable MGBE Ethernet */
fragment@3 {
target-path = "/";
__overlay__ {
ethernet@6810000 {
status = "disabled";
};
ethernet@6910000 {
status = "disabled";
};
ethernet@6A10000 {
status = "disabled";
};
ethernet@6B10000 {
status = "disabled";
};
};
};
/* Add RGMII Ethernet */
fragment@4 {
target-path = "/";
__overlay__ {
ethernet@2310000 {
status = "okay";
nvidia,mac-addr-idx = <0>;
nvidia,phy-reset-gpio = <&tegra_main_gpio TEGRA234_MAIN_GPIO(G, 5) 0>;
phy-mode = "rgmii-id";
phy-handle = <&phy>;
nvidia,max-platfrom-mtu = <8000>;
nvidia,pause_frames = <0>; /* 0=enable, 1=disable */
mdio {
compatible = "nvidia,eqos-mdio";
#address-cells = <1>;
#size-cells = <0>;
phy: phy@1 {
reg = <0>;
nvidia,phy-rst-pdelay-msec = <224>; /* msec */
nvidia,phy-rst-duration-usec = <10000>; /* usec */
interrupt-parent = <&tegra_main_gpio>;
interrupts = <TEGRA234_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
marvell,copper-mode;
/* Setup LED[2] as interrupt pin (active low) */
marvell,reg-init = <0x03 0x12 0x7fff 0x880>;
};
};
};
};
};
Pinmux (extract, see full files below)
eqos_txc_pe0 {
nvidia,pins = "eqos_txc_pe0";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
eqos_td0_pe1 {
nvidia,pins = "eqos_td0_pe1";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
eqos_td1_pe2 {
nvidia,pins = "eqos_td1_pe2";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
eqos_td2_pe3 {
nvidia,pins = "eqos_td2_pe3";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
eqos_td3_pe4 {
nvidia,pins = "eqos_td3_pe4";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
eqos_tx_ctl_pe5 {
nvidia,pins = "eqos_tx_ctl_pe5";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
eqos_rd0_pe6 {
nvidia,pins = "eqos_rd0_pe6";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_rd1_pe7 {
nvidia,pins = "eqos_rd1_pe7";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_rd2_pf0 {
nvidia,pins = "eqos_rd2_pf0";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_rd3_pf1 {
nvidia,pins = "eqos_rd3_pf1";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_rx_ctl_pf2 {
nvidia,pins = "eqos_rx_ctl_pf2";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_rxc_pf3 {
nvidia,pins = "eqos_rxc_pf3";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_sma_mdio_pf4 {
nvidia,pins = "eqos_sma_mdio_pf4";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
eqos_sma_mdc_pf5 {
nvidia,pins = "eqos_sma_mdc_pf5";
nvidia,function = "eqos";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
Custom board configuration:
# This is the default Devkit (64GB) module. We'll update to the 32GB with the
# change in update_flash_args_common()
DTB_FILE="tegra234-p3701-0000-p3737-0000.dtb";
TBCDTB_FILE="tegra234-p3701-0000-p3737-0000.dtb";
EMMC_CFG="flash_t234_qspi_sdmmc.xml";
PINMUX_CONFIG="Orin-galaxy-pinmux.dtsi";
PMC_CONFIG="Orin-galaxy-padvoltage-default.dtsi";
OVERLAY_DTB_FILE="tegra234-galaxy-overlay.dtbo";
ODMDATA="gbe-uphy-config-0,hsstp-lane-map-3,nvhs-uphy-config-0,hsio-uphy-config-0";
MB2_BCT="tegra234-mb2-bct-misc-galaxy-orin.dts";
Pinmux:
Orin-galaxy-pinmux.dtsi (64.6 KB)
Orin-galaxy-gpio-default.dtsi (3.9 KB)
Orin-galaxy-padvoltage-default.dtsi (1.4 KB)
Flashing confirms that the pinmux is written:
flash.log (473.1 KB)
Dumped device-tree:
device-tree-dump.txt (523.1 KB)
Debug outputs:
dmesg.txt (65.8 KB)
ifconfig.txt (1.3 KB)
link.txt (500 Bytes)
ethtool.txt (1.1 KB)
ethtool_t.txt (133 Bytes)
ethtool_S.txt (8.9 KB)
interrupts.txt (21.3 KB)
gpio.txt (7.2 KB)
pinctrl-maps.txt (3.6 KB)
pinctrl-handles.txt (2.8 KB)
Any inputs are welcome! Thank you