I’m working with a board that was originally developed for a Xavier AGX module, but we’ve built an adapter board to allow us to fit an Orin AGX to it. This means we’re using the same Marvell 88E1512 PHY we used with the Xavier version, and it communicates using RGMII. After reading other posts here, we’ve enabled the ethernet@2310000 and disabled ethernet@6800000. Also, as mentioned in other posts, we’ve reviewed our pinmux spreadsheet and the pinmux dtsi file generated from it and all the signals related to RGMII appear to be configured correctly.
I’m attaching our top-level dts file and all the spreadsheet generated dtsi files, and including a snippet of dmesg output to show how the driver is failing at this time.
One other post recommended checking /sys/bus/mdio_bus/devices/ to see if the ethernet interface appeared there. It does not.
dmesg output:
[ 11.301123] nvethernet 2310000.ethernet: Adding to iommu group 52
[ 11.301320] nvethernet 2310000.ethernet: failed to read skip mac reset flag, default 0
[ 11.301324] nvethernet 2310000.ethernet: failed to read MDIO address
[ 11.301328] nvethernet 2310000.ethernet: setting to default DMA bit mask
[ 11.688141] nvethernet 2310000.ethernet: Ethernet MAC address: 48:b0:2d:ef:1f:2e
[ 11.690171] nvethernet 2310000.ethernet: Macsec not enabled
[ 11.690174] nvethernet 2310000.ethernet: Macsec: Reduced MTU: 1466 Max: 8000
[ 11.691499] nvethernet 2310000.ethernet: eth0 (HW ver: 53) created with 8 DMA channels
[ 13.116801] nvethernet 2310000.ethernet: [poll_check][42][type:0x4][loga-0x0] poll_check: timeout
[ 13.116816] nvethernet 2310000.ethernet: ether_open: failed to initialize MAC HW core with reason -1
We discovered that the six rx pins didn’t have the pullup enabled. I made this modification to the dtsi file, rebuilt the dtb and updated the device, but we are still seeing the same errors.
My apologies, I thought it was clear that when I said “the same errors” that I meant that the output in dmesg was the same. Here’s the output from the ethernet driver after the pull-up changes were made to the device tree:
[ 10.901134] nvethernet 2310000.ethernet: Adding to iommu group 49
[ 10.901921] nvethernet 2310000.ethernet: failed to read skip mac reset flag, default 0
[ 10.901925] nvethernet 2310000.ethernet: failed to read MDIO address
[ 10.901930] nvethernet 2310000.ethernet: setting to default DMA bit mask
[ 11.296999] nvethernet 2310000.ethernet: Ethernet MAC address: 48:b0:2d:ef:1f:2e
[ 11.301544] nvethernet 2310000.ethernet: Macsec not enabled
[ 11.301549] nvethernet 2310000.ethernet: Macsec: Reduced MTU: 1466 Max: 8000
[ 11.302961] nvethernet 2310000.ethernet: eth0 (HW ver: 53) created with 8 DMA channels
[ 13.378243] nvethernet 2310000.ethernet: [poll_check][42][type:0x4][loga-0x0] poll_check: timeout
[ 13.378253] nvethernet 2310000.ethernet: ether_open: failed to initialize MAC HW core with reason -1
As well, I’ve attached the entire dmesg output. dmesg.gz (15.9 KB)
The first block here seems to match exactly with what’s shown in the adaptation guide. The second section, taken from the decompiled dtb, appears to match the source. And just to be sure, I looked in /proc/device-tree/pinmux@2430000/common/soc_gpio17_pg4 and the entries there also match the values shown above.
Is there some other way for this pin’s function to be changed?
I’m sorry, it seems my last comment was unclear. The first device-tree snippet is taken from Orin-jetson_agx_orin_fe-pinmux.dtsi, a file generated by the pinmux spreadsheet, and it is included in my franken.dts file (see the tar file I uploaded earlier).
My dts file is being compiled into a dtb (franken.dtb) and I then decompiled that file and loaded the result into an editor where I found the second snippet above, which seems to confirm that the pin will be configured correctly.
If the pin description above is not correct (I believe that it is as it matches what I found in the adaptation guide) could you provide the correct description so that I can modify my file accordingly?
I’m sorry, it seems my last comment was unclear. The first device-tree snippet is taken from Orin-jetson_agx_orin_fe-pinmux.dtsi, a file generated by the pinmux spreadsheet, and it is included in my franken.dts file (see the tar file I uploaded earlier).
My dts file is being compiled into a dtb (franken.dtb) and I then decompiled that file and loaded the result into an editor where I found the second snippet above, which seems to confirm that the pin will be configured correctly
Unfortunately, this whole comment from you is wrong.
The pinmux dtsi files are not in use in kernel dtb. They should be copied to Linux_for_Tegra/bootloader and Linux_for_Tegra/bootloader/generic directly.
Your franken.dtb is kernel device tree which won’t handle pinmux things.
This is the missing piece of information that I needed! I’ve read through the adaptation guide to make sure there isn’t anything else that is changed (vs Xavier) that I need to be aware of so get this device working.