Problem
With JetPack 7.0, I was able to enable C5 bus on Thor SOM, but after moving to JetPack 7.2 the C5 bus is broken – either UEFI crashes (if C5 bus is enabled in UEFI) or CBB exceptions in Linux pcie driver (if C5 bus is left disabled in
UEFI, and later enabled in Linux)
I checked steps in developer guide for enabling PCIe bus
- did turn off C4 and enable C5 in BPMP dtb
- want to keep as root port
- did turn off C4 and enable C5 in kernel dtb
- custom pinmux generated from spreadsheet does turn on CLKREQ and RST_N pins for C5
Am I forgetting something? Or could this be a regression in JP 7.2?
Context
I’m working with a Thor SOM on custom carrier board, on which UPHY1 is split between MGBE port and 4-lane PCI hooked up to an FPGA. I have an earlier ticket about trying to get the FPGA detected on C5 bus, ending with a recommendation to try a later release where DLFE could be disabled to support legacy devices.
JetPack 7.2 is reported to have this DLFE control feature (via a new disable-dlfe attribute in BPMP dtb), but so far I have been stuck with this problem and didn’t get far enough to try it.
initial attempt to bring up C5 bus on JetPack 7.2
First I tried the normal thing, which is enable C5 instead of C4 in both bpmp and kernel dtbs
On JetPack 7.0, C5 bus could be seen, just no devices found on it:
lspci
0000:00:00.0 PCI bridge: NVIDIA Corporation Device 22e6
0000:01:00.0 3D controller: NVIDIA Corporation Device 2b00 (rev a1)
0001:00:00.0 PCI bridge: NVIDIA Corporation Device 22d8
0001:01:00.0 Ethernet controller: Microchip Technology / SMSC LAN7430 (rev 11)
0002:00:00.0 PCI bridge: NVIDIA Corporation Device 22d8
0002:01:00.0 Ethernet controller: Microchip Technology / SMSC LAN7430 (rev 11)
0003:00:00.0 PCI bridge: NVIDIA Corporation Device 22da
0003:01:00.0 Non-Volatile memory controller: Apacer Technology Device 0180
0005:00:00.0 PCI bridge: NVIDIA Corporation Device 22d8
On JetPack 7.2, enabling C5 bus caused UEFI to crash so install didn’t even finish:
INFO: Initialized VM: 0x8002, boot_order: 1
NOTICE: Finished initializing all VMs.
NOTICE: BL31 Boot Complete
ÿát26x_general UEFI firmware (version 39.2.0-gcid-45755727 built on 2026-06-01T20:15:58+00:00)
3hÿí3hÿäUnhandled Exception in EL3.
x30 = 0x000000000ff411f4
x0 = 0x0000000000000000
x1 = 0x00000000be000011
x2 = 0x0000000000000011
x3 = 0x0000000000000000
...
Building a debug version of UEFI indicated that the crash was, not surprisingly, in scanning PCIe bus
(boot device is NVMe, so PCIe support needs to be enabled)
INFO: Initialized VM: 0x8002, boot_order: 1
NOTICE: Finished initializing all VMs.
NOTICE: BL31 Boot Complete
ÿát26x_general UEFI firmware (version r39.2-bd49b331 built on 2026-06-21T01:19:34+00:00)
Memory: 0x1F93000000-0x1F96FFF000 (0x3FFF000)
Stack : 0x1F96FDD000-0x1F96FFF000 (0x22000)
...
PCIe Socket-0x0:Ctrl-0x2 Link is UP (Capable: Gen-5,x2 Negotiated: Gen-1,x1)
ÿäUnhandled Exception in EL3.
x30 = 0x000000000ff411f4
x0 = 0x0000000000000000
x1 = 0x00000000be000011
x2 = 0x0000000000000011
x3 = 0x0000000000000000
jp70-successful-boot.dmesg.txt (118.5 KB)
jp72-c5-enabled-uefi-dbg-crash.log.txt (120.1 KB)
changes imported from JP 7.0 to JP 7.2
- switched from C4 to C5 in bpmp dtb
- switched from C4 to C5 in kernel dtb
- imported pinmux dtsi generated for custom carrier board
JP 7.0 devicetree changes:
jp70-tegra264-bpmp-3834-0008-3971-xxxx.dts.diff.txt (808 Bytes)
jp70-tegra264-bpmp-3834-0008-3971-xxxx.dts.uphy1-config8-hotplug.txt (17.1 KB)
jp70-tegra264-p3971-0080+p3834-0008-qspi-nvme.dts.txt (324.8 KB)
JP 7.2 devicetree:
jp72-tegra264-bpmp-3834-0008-3971-xxxx.dts.diff.c5-enabled.txt (703 Bytes)
jp72-tegra264-bpmp-3834-0008-3971-xxxx.dts.c5-enabled.txt (18.7 KB)
jp72-tegra264-p3971-0000.dtsi.diff.c5-enabled.txt (494 Bytes)
jp72-tegra264-p3971-0080+p3834-0008-qspi-nvme.dts.c5-enabled.txt (331.9 KB)
custom pinmux for both:
tegra264-mb1-bct-pinmux-p3834-xxxx-p3971-0000-b02.dtsi.txt (89.5 KB)
tegra264-mb1-bct-padvoltage-p3834-xxxx-p3971-0000-b02.dtsi.txt (2.0 KB)
tegra264-mb1-bct-gpio-p3834-xxxx-p3971-0000-b02.dtsi.txt (3.3 KB)
attempted workaround with dtb overlay
Wondering if the problem was a regression in UEFI, I tried to enable C5 in Linux without letting UEFI scan for it: still enabled C5 instead of C4 in bpmp dtb, but now left it disabled in kernel dtb (skip C5 scan in UEFI) and created a dtbo to enable it later (try C5 scan with Linux driver).
The first part worked; with C5 PCIe bus removed from main linux dtb, UEFI does not crash.
However when the kernel tries to bring up C5 controller, then the kernel gets CBB exceptions
[ 9.131447] **************************************
[ 9.131451] CPU:0, Error:top-cbb-fabric, Errmon:1
[ 9.131455] Error Code : PWRDOWN_ERR
[ 9.138791] usb 1-2.2: Product: USB2.1 Hub
[ 9.143670] Overflow : Multiple PWRDOWN_ERR
[ 9.148211] usb 1-2.2: Manufacturer: GenesysLogic
[ 9.166730] Error Code : PWRDOWN_ERR
[ 9.170563] MASTER_ID : CCPLEX
[ 9.174053] Address : 0xc8b0000018
[ 9.177895] Cache : 0x0 -- Device Non-Bufferable
[ 9.182785] Protection : 0x2 -- Unprivileged, Non-Secure, Data Access
[ 9.189770] Access_Type : Read
[ 9.192912] Access_ID : 0x5
[ 9.192914] Fabric_Id : 0x4
[ 9.199200] Fabric : uphy0-cbb-fabric
[ 9.203398] or Fabric : aon-fabric
[ 9.206882] Please use Address to determine correct fabric.
[ 9.212818] Slave_Id : 0x2e
[ 9.215962] Burst_length : 0x0
[ 9.219455] Burst_type : 0x1
[ 9.222597] Beat_size : 0x2
[ 9.222869] tegra264-pcie a808480000.pcie: PCIe Controller-5 Link is UP (Speed: 15)
[ 9.225740] VQC : 0x0
[ 9.236224] GRPSEC : 0x7e
[ 9.239011] FALCONSEC : 0x0
[ 9.242156] **************************************
and bus 5 is missing
lspci
0000:00:00.0 PCI bridge: NVIDIA Corporation Device 22e6
0000:01:00.0 3D controller: NVIDIA Corporation Device 2b00 (rev a1)
0001:00:00.0 PCI bridge: NVIDIA Corporation Device 22d8
0001:01:00.0 Ethernet controller: Microchip Technology / SMSC LAN7430 (rev 11)
0002:00:00.0 PCI bridge: NVIDIA Corporation Device 22d8
0002:01:00.0 Ethernet controller: Microchip Technology / SMSC LAN7430 (rev 11)
0003:00:00.0 PCI bridge: NVIDIA Corporation Device 22da
0003:01:00.0 Non-Volatile memory controller: Apacer Technology Device 0180
jp72-boot-with-cbb-exceptions.dmesg.txt (119.3 KB)
changes to enable C5 in linux but not UEFI
- both C4 and C5 disabled in kernel dtb
- enable C4 from kernel dtbo
jp72-tegra264-p3971-0000.dtsi.diff.both-disabled.txt (542 Bytes)
pcie-overlay.extlinux.conf.txt (1.5 KB)
pcie-overlay.dts.txt (437 Bytes)