Since Nvidia has released jetPack 4.2 which flases Ubuntu 18.04 on the target, I would be happy if you someone could let me know how the SPI can be enabled on this version. Since this wiki post (https://elinux.org/Jetson/TX2_SPI) targets l4t 28.2 and earlier, how can the shell scripts from this wiki post and especially the scripts from JetsonHacks (https://github.com/jetsonhacks/buildJetsonTX2Kernel) can be modied to enable the kernel module for L4T 32.1?
I have the exact same problem. Our system runs with 28.1 and we are working
to update to JP 4.2/Ubuntu 18.04
There are 5 spi devices in the device tree,
There are 3 in /sys/devices
Only 1 is a bus.
# find /sys/firmware/devicetree/base/ -name 'spi@*'
# find /sys/devices -name '*.spi'
# ls /sys/bus/spi/devices
# interestingly in dmesg...
# dmesg | grep spi
[ 0.433819] iommu: Adding device 3210000.spi to group 11
[ 0.434155] iommu: Adding device c260000.spi to group 12
[ 0.434484] iommu: Adding device 3240000.spi to group 13
We are trying to locate the device in our driver with
We can locate spi@c260000 with
I can only locate spi bus with bus number 0.
Note, we do not create a spi device, but rather use the spi_read and spi_write bus
functions since we have to go through other circuitry to handle the chip enables.
Thanks for your response,
I enabled the spi by following the procedure mentioned in https://devtalk.nvidia.com/default/topic/1049799/jetson-tx2/howto-enable-spi-interface-with-jetpack-4-2-/post/5328694/#5328694 from the host side. Then the ls /dev/spi* did list the spidev3.0 module.
So following your reference, in the case of Jetson Tx2, I’m trying to modify the tegra186-mb1-bct-pinmux-quill-p3310-1000-c03 file in the Linux_for_Tegra_tx2/bootloader/t186ref/BCT. My question is since, I’m planning to SPI, what exactly must be changed in that file? because I could ascertain the SPI functionality by executing
sudo devmem2 0x02430038 w 0x401
sudo devmem2 0x02430040 w 0x455
sudo devmem2 0x02430048 w 0x401
sudo devmem2 0x02430050 w 0x409
But searching for an address say 0x02430038 from the above command in tegra186-mb1-bct-pinmux-quill-p3310-1000-c03 yields two search results for each of the above mentioned addresses.So I would be happy if you could let me know which entry in the tegra186-mb1-bct-pinmux-quill-p3310-1000-c03 file must be modied? Whether both the entries correspinding to a particular pin must be modified or one?
I experimented by modifying the contents of the pinmux file as seen below on the host side
pinmux.0x02430038 = 0x401;
pinmux.0x02430040 = 0x455;
pinmux.0x02430048 = 0x401;
pinmux.0x02430050 = 0x409;
sudo ./flash.sh -k kernel-dtb jetson-tx2 mmcblk0p1
which was successful. In order to check whether the register contents are updated for SPI by reading the memory using devmem2, it looks like all the four registers mentioned above retain their old contents. I guess, I’m not flasing the target correctly. Any leads will be much appreciated.
Please try to flash by below command after modify the cfg file.
sudo ./flash.sh -r jetson-tx2 mmcblk0p1