Error applying device tree for custom LiDAR (CAM1, MIPI 4-Lane, RAW12) Jetson Nano Orin Dev Kit

Hello,

I am trying to connect a custom LiDAR to CAM1 via MIPI. Here are the hardware specifications:

  • Interface: MIPI CSI-2

  • Lanes: 4-Lane

  • Data Format: RAW12

I configured the device tree for this setup. However, I encounter an error when applying it. The system fails to probe the device properly.

Here is my device tree configuration:

/dts-v1/;
/plugin/;

#define CAM_I2C_MUX 19
#define GPIO_ACTIVE_HIGH 0

/ {
	overlay-name = "ADS6311 + GPIO bidirectional";
	/* 40pin GPIO pinmux + 24pin CSI camera in one DTBO */
	jetson-header-name = "Jetson 40pin Header";
	compatible = "nvidia,p3768-0000+p3767-0000", "nvidia,p3768-0000+p3767-0001", "nvidia,p3768-0000+p3767-0003", "nvidia,p3768-0000+p3767-0004", "nvidia,p3768-0000+p3767-0005", "nvidia,p3768-0000+p3767-0000-super", "nvidia,p3768-0000+p3767-0001-super", "nvidia,p3768-0000+p3767-0003-super", "nvidia,p3768-0000+p3767-0004-super", "nvidia,p3768-0000+p3767-0005-super", "nvidia,p3509-0000+p3767-0000", "nvidia,p3509-0000+p3767-0001", "nvidia,p3509-0000+p3767-0003", "nvidia,p3509-0000+p3767-0004", "nvidia,p3509-0000+p3767-0005";

	/* fragment@0: Jetson 40pin header GPIO pinmux (from gpio.dts) */
	fragment@0 {
		target = <&pinmux>;

		__overlay__ {
			pinctrl-names = "default";
			pinctrl-0 = <&jetson_io_pinmux>;

			jetson_io_pinmux: exp-header-pinmux {
				hdr40-pin7 {
					nvidia,pins = "soc_gpio59_pac6";
					nvidia,tristate = <0x0>;
					nvidia,enable-input = <0x1>;
					nvidia,pull = <0x0>;
				};
				hdr40-pin15 {
					nvidia,pins = "soc_gpio39_pn1";
					nvidia,tristate = <0x0>;
					nvidia,enable-input = <0x1>;
					nvidia,pull = <0x0>;
				};
				hdr40-pin29 {
					nvidia,pins = "soc_gpio32_pq5";
					nvidia,tristate = <0x0>;
					nvidia,enable-input = <0x1>;
					nvidia,pull = <0x0>;
				};
				hdr40-pin31 {
					nvidia,pins = "soc_gpio33_pq6";
					nvidia,tristate = <0x0>;
					nvidia,enable-input = <0x1>;
					nvidia,pull = <0x0>;
				};
				hdr40-pin32 {
					nvidia,pins = "soc_gpio19_pg6";
					nvidia,tristate = <0x0>;
					nvidia,enable-input = <0x1>;
					nvidia,pull = <0x0>;
				};
				hdr40-pin33 {
					nvidia,pins = "soc_gpio21_ph0";
					nvidia,tristate = <0x0>;
					nvidia,enable-input = <0x1>;
					nvidia,pull = <0x0>;
				};
			};
		};
	};

	/* fragment@1: ADS6311 MIPI CSI-2 RAW12 (from ads6311.dts) */
	fragment@1 {
		target-path = "/";
		__overlay__ {
			tegra-capture-vi {
				num-channels = <1>;
				ports {
					#address-cells = <1>;
					#size-cells = <0>;
					vi_port: port@0 {
						reg = <0>;
						vi_in: endpoint {
							port-index = <2>;
							bus-width = <4>;
							remote-endpoint = <&csi_out>;
						};
					};
				};
			};

			tegra-camera-platform {
				compatible = "nvidia, tegra-camera-platform";
				num_csi_lanes = <4>;
				max_lane_speed = <1500000>;
				min_bits_per_pixel = <12>;
				vi_peak_byte_per_pixel = <2>;
				vi_bw_margin_pct = <25>;
				max_pixel_rate = <7500000>;
				isp_peak_byte_per_pixel = <2>;
				isp_bw_margin_pct = <25>;

				modules {
					cam_module0: module0 {
						badge = "ads6311";
						position = "front";
						orientation = "1";
						drivernode0 {
							pcl_id = "v4l2_sensor";
							sysfs-device-tree = "/sys/firmware/devicetree/base/bus@0/cam_i2cmux/i2c@1/ads6311@12";
						};
					};
				};
			};

			bus@0 {
				host1x@13e00000 {
					nvcsi@15a00000 {
						num-channels = <1>;
						#address-cells = <1>;
						#size-cells = <0>;

						csi_chan: channel@0 {
							reg = <0>;
							ports {
								#address-cells = <1>;
								#size-cells = <0>;
								csi_cahn1_port0: port@0 {
									reg = <0>;
									csi_in: endpoint {
										port-index = <2>;
										bus-width = <4>;
										remote-endpoint = <&ads6311_out>;
									};
								};

								csi_chan1_port1: port@1 {
									reg = <1>;
									csi_out: endpoint {
										remote-endpoint = <&vi_in>;
									};
								};
							};
						};
					};
				};

				cam_i2cmux {
					status = "okay";
					compatible = "i2c-mux-gpio";
					#address-cells = <1>;
					#size-cells = <0>;
					mux-gpios = <&gpio_aon CAM_I2C_MUX GPIO_ACTIVE_HIGH>;
					i2c-parent = <&cam_i2c>;

					i2c@1 {
						status = "okay";
						reg = <1>;
						#address-cells = <1>;
						#size-cells = <0>;

						ads6311@12 {
							compatible = "namuga,ads6311";
							reg = <0x12>;
							
							devnode = "video0";
							use_sensor_mode_id = "true";
							sensor_model = "ads6311";

							num_lanes = "4";

							mode0 {
								num_lanes = "4";
								tegra_sinterface = "serial_c";
								readout_orientation = "0";
								lane_polarity = "0";
								mode_type = "bayer";
								pixel_phase = "grbg";
								csi_pixel_bit_depth = "12";
								mclk_khz = "24000";
								phy_mode = "DPHY";
								discontinuous_clk = "no";
								active_w = "60888";
								active_h = "64";
								line_length = "60888";

								dpcm_enable = "false";
								cil_settletime = "0";
							};

							ports {
								#address-cells = <1>;
								#size-cells = <0>;

								port@0 {
									reg = <0>;
									ads6311_out: endpoint {
										remote-endpoint = <&csi_in>;
										port-index = <2>;
										bus-width = <4>;
										bus-type = <4>; /* MIPI_CSI2_DPHY */
										clock-lanes = <0>;
										data-lanes = <1 2 3 4>;
										link-frequencies = /bits/ 64 <400000000>;
									};
								};
							};
						};
					};
				};
			};
		};
	};
};

Could you provide any advice on what might be wrong with my device tree? Any help would be appreciated.

Thank you.

What’s the error message?

Maybe dump your device tree to confirm the configuration.

sudo dtc -I fs -O dts -o extracted_proc.dts /sys/firmware/devicetree/base

Here is the extracted device tree file.

As for the error message, there isn’t one.

after applying the settings and rebooting, the system goes directly into Recovery Mode and fails to boot.

extracted_proc.txt (329.7 KB)

@ShaneCCC

i solved this problem.

i remove mode node in driver node.

but i didn’t get data.

this is log message

 kworker/0:1-2566    [000] .......  1165.146634: rtcpu_nvcsi_intr: tstamp:37277924462 class:GLOBAL type:PHY_INTR0 phy:1 cil:0 st:0 vc:0 status:0x10000044
 kworker/0:1-2566    [000] .......  1165.146634: rtcpu_nvcsi_intr: tstamp:37277924462 class:GLOBAL type:PHY_INTR0 phy:1 cil:1 st:0 vc:0 status:0x00000004
 kworker/0:1-2566    [000] .......  1165.146634: rtcpu_nvcsi_intr: tstamp:37277924462 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 st:0 vc:0 status:0x00001044
 kworker/0:1-2566    [000] .......  1165.146634: rtcpu_nvcsi_intr: tstamp:37277924462 class:CORRECTABLE_ERR type:PHY_INTR phy:1 cil:1 st:0 vc:0 status:0x00000004

These four lines are PHY-layer NVCSI errors on PHY1, affecting both CIL partitions. The main issue is on cil:0.

Decode

GLOBAL type:PHY_INTR0 phy:1 cil:0 status:0x10000044

0x10000044 = bit 28 + bit 6 + bit 2:

  • bit 28 → intr_dphy_cil_lane_align_err_a
    = lane alignment error on PHY1 CIL-A
  • bit 6 → intr_cil_data_lane_sot_mb_err1_a
    = more than one bit error in the sync word on data lane 1
  • bit 2 → intr_cil_data_lane_sot_mb_err0_a
    = more than one bit error in the sync word on data lane 0

GLOBAL type:PHY_INTR0 phy:1 cil:1 status:0x00000004

0x4 = bit 2:

  • intr_cil_data_lane_sot_mb_err0_b
    = more than one bit error in the sync word on data lane 0 of CIL-B

CORRECTABLE_ERR type:PHY_INTR phy:1 cil:0 status:0x00001044

This is the correctable-error view of the same PHY1/CIL-A event:

  • bit 12 → err_intr_dphy_cil_lane_align_err_a
  • bit 6 → err_intr_cil_data_lane_sot_mb_err1_a
  • bit 2 → err_intr_cil_data_lane_sot_mb_err0_a

CORRECTABLE_ERR type:PHY_INTR phy:1 cil:1 status:0x00000004

  • bit 2 → err_intr_cil_data_lane_sot_mb_err0_b

What it means

This is a MIPI PHY / signal-quality / timing problem, not a VI software issue:

  • SOT multi-bit errors mean NVCSI is seeing a bad HS sync word on the data lane(s).
  • lane_align_err means the receiver saw lane alignment failure across the D-PHY lanes.