Establish a PCIe endpoint connection between an x86 board and a Jetson Orin NX

Robotics & Edge Computing Jetson & Embedded Systems Jetson Orin NX
1

I am currently using L4T 36.4.3.
Before flashing the Jetson Orin NX, I modified the configuration file to override ODMDATA as follows and then proceeded with the flashing.

image

According to PCIe Endpoint Mode — NVIDIA Jetson Linux Developer Guide
I ran the necessary commands to enable PCIe endpoint mode on the Jetson Orin NX.
However, after booting the x86 board (root port), it fails to detect the Jetson Orin NX as an endpoint.
I also tried setting up Ethernet over PCIe in the same way, but it didn’t work properly.

image
image732×258 34.2 KB

While reading the datasheet, I came across the following statement:
“For Endpoint operation, the mux should be set to output the HS_UPHY2_REFCLK2 signals. SoC GP21, which is used for the mux select, should be set high.”
Do I need to configure this manually, or is it automatically set to high in the mux when modifying the ODMDATA?

image
image892×603 140 KB

If this is not something I need to configure manually, then is it possible that the x86 board and Jetson cannot communicate via PCIe endpoint mode?
Please let me know if there’s anything I might have missed.

3

We didn’t validate that with x86 PC before but only Orin to Orin setup.

4

Is there a specific way to check the signals of the SoC GP21 in Orin NX?