Flashing Xavier with modified Device Tree

I am trying to enable SPI1 on Xavier using the Jetpack 4.2 SDK. I followed the steps listed on this discussion:

https://devtalk.nvidia.com/default/topic/1044595/jetson-agx-xavier/question-how-do-i-enable-and-address-spi-ports-/2

when I try using flash.sh using this command:

sudo ./flash -k kernel-dtb jetson-xavier mmcblk0p1

I am not able to boot the xavier. Instead, I get a tegra-xusb: cannot find firmware error where it proceeds to hang. I am not sure how to fix that or why that error is occurring.

Thanks!

hello haormsle,

may I know did you create the Xavier dtb with binary tool or compile from the kernel sources?
please modify the device tree, and create your customize dtb files for flashing.
you may also refer to Xavier Series (SoC) Technical Reference Manual, and check the address map for the SPI addresses.
thanks

Hi Jerry,

My steps were the following:

  1. used device tree compiler on the Xavier to create the device tree from /proc/device-tree
  2. Moved the device tree file to the host and replaced the tegra194-p2888-0001-p2822-0000.dtb in …/kernel/dtb
  3. Flashed using the following command:
sudo ./flash -r -k kernel-dtb jetson-xavier mmcblk0p1

.

Then the Xavier proceeds to hang on boot with:
tegra-xusb 3610000.xhci: cannot find firmware

With regards to the SPI addresses I just use the SPI1 address given to me in the extracted device tree file(spi@c260000) despite the TRM showing that SPI1 has a device address of 3210000.

my dts file looks like this:

spi@c260000 {
    	compatible = "nvidia,tegra186-spi";
    	clocks = <0x4 0x88 0x4 0x5e 0x4 0x5b>;
    	resets = <0x5 0x5c>;
    	dma-coherent;
    	clock-names = "spi", "pll_p", "osc";
    	nvidia,clk-parents = "pll_p", "osc";
    	status = "okay";
    	#address-cells = <0x1>;
    	interrupts = <0x0 0x25 0x4>;
    	#size-cells = <0x0>;
    	dma-names = "rx", "tx";
    	phandle = <0x161>;
    	reg = <0x0 0xc260000 0x0 0x10000>;
    	iommus = <0x2 0x20>;
    	dmas = <0x1e 0x10 0x1e 0x10>;
    	reset-names = "spi";
    	linux,phandle = <0x161>;
    	spi-max-frequency = <0xb71b00>;
        ...
        ...
    	spidev@0 {
    		compatible = "spidev";
    		reg = <0x0>;
    		spi-max-frequency = <0x17d7840>;
    	};
    };

hello haormsle,

you should change the device tree configuration by compile from the kernel sources.
please download L4T sources via Jetson Download Center, then you should check Kernel Customization chapter for the steps to build from sources.

please have verification,
thanks

Having the same issue. We are modifying a device tree which has support for camera connectors. Can this be the cause of the problem?

hello jjaekel,

we may need detail messages to check the issue.
please connect Jetson-Xavier with the serial port to gather uart logs,
thanks

Hi Jerry,

Attached below are the UART logs from startup.

I was following the instructions in https://devtalk.nvidia.com/default/topic/1044595/jetson-agx-xavier/question-how-do-i-enable-and-address-spi-ports-/post/5307630/#5307630).

UART_log.txt (81.9 KB)

Hi Jerry,

I can compile from the kernel sources completely fine. However, I am unsure which dtsi file to modify in order to add spidev to the device tree? I am guessing it is somewhere in hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0001-p2822-0000-common.dtsi but that does not activate spidev. Therefore, I am unsure which dtsi file to modify?

hello jjaekel,

your messages in comment #7 did not show suspect failures to hang the device,
is it incomplete? you may using the code-block macro or upload an attachment to ensure the details.
thanks

hello haormsle,

you may also refer to below similar discussion thread, such as Topic 1061457, and Topic 1050427 for enabling SPI devices.
thanks

1 Like

My mistake. I edited the post and included the UART output as an attachment.