We are trying to get SPI running on our custom carrier board.
We are using the same pins of the Jetson Xavier NX SoM that are used for the 40-pin Extension Header on the NVIDIA Dev-Kit (jakku). Accordingly, we are also using the original device tree files of the JetPack 4.6.2 (L4T R32.7.2), downloaded via SDK Manager tool (version 126.96.36.19931). We used the following command to install the Jetson OS components:
sdkmanager --cli install --logintype devzone --product Jetson --target JETSON_XAVIER_NX_TARGETS --targetos Linux --version 4.6.2 --select 'Jetson OS'
and obtained the kernel and device tree sources via the following command:
./source_sync.sh -t tegra-l4t-r32.7.1
We used the default kernel config file ‘tegra_defconfig’ for compiling the kernel and device tree sources.
According to the Jetson Xavier NX Product Design Guide (page 69 and 70) I assumed that with this default configuration the following SPI interfaces would be available:
- SPI1 on SoM pins 89, 91, 93, 95, 97 and
- SPI3 on SoM pins 104, 106, 108, 110, 112.
Actually, there is no communication visible when measuring with oscilloscope; neither on SPI1 nor on SPI3 pins.
Our workflow for launching SPI communication is as follows:
sudo insmod /lib/modules/4.9.253-tegra/kernel/drivers/spi/spidev.komakes the linux devices
- Open and configure SPI device using ioctl()-operations.
- Transfer data via SPI using ioctl()-operations.
Instead of being able to use the SoM pins for SPI communication (SFIO) we are able to use them as GPIOs via the sysfs interface (export, set direction, set pin value). This should not be able if the pins are (correctly) configured as SFIO pins right?
In the original/unmodified Pinmux Spreadsheet downloaded from Jetson Download Center column Customer Usage is set to GPIO, not to SFIO. So, the pins of SPI1 and SPI3 are not configured for SPI communication.
This is consistent with the behavior we observe as we are able to control the GPIO, but are unable to use the pins as SFIO for SPI communication.
According to section 40-pin GPIO Expansion Header in the Developer Guide - and more specifically the sub-section Pinmux Configuration - the Jetson-IO tool may be used to change the pinmux configuration of the 40-pin GPIO Expansion Header. We performed the following steps to change pinmux configuration via th Jetson-IO tool:
- Select ‘Configure Jetson 40pin Header’:
- Select ‘Configure header pins manually’:
- Select ‘spi1’ and ‘spi3’:
- Select ‘Save pin changes’:
- Select ’ Save and reboot to reconfigure pins’:
- Confirm changes and reboot:
After the reboot the pinmux configuration remains unchanged:
Why is the pinmux configuration created with Jetson-IO tool not applied?
Are we missing something to get the SPI1 on pins 89, 91, 93, 95, 97 and SPI3 on pins 104, 106, 108, 110, 112?
Thanks in advance!