TX2 NX SPI pinmux setting on R32.6.1 error

Robotics & Edge Computing Jetson Systems Jetson TX2
1

Hi all,
At present, when I configure it through jetson-io.py, I find that the spi is already configured. However, the program process test using spidev_test finds that it cannot communicate. May I ask how to change pinmux so as not to use jetson- io.py to configure, you can use the function of spi.

We use the core of TX2 NX on the self-developed carrier board and want to use the function of spi. When I change the pinmux according to this post, the system cannot be started.
https://forums.developer.nvidia.com/t/how-to-use-aon-spi-on-tx2-nx/187540/3
Attached is the log of the system not starting.
spi_pinmux_error.log (26.7 KB)

3

I check the jetson-io with r32.7.1 without problem.
Suppose you can modify the PINs by modify the dts file instead of jetson-io

4

Below is the pin configure by jetson-io,
You can add it manually.

        pinmux@2430000 {
                compatible = "nvidia,tegra186-pinmux";
                status = "okay";
                phandle = <0x89>;
                reg = <0x0 0x2430000 0x0 0x15000 0x0 0xc300000 0x0 0x4000>;
                pinctrl-0 = <0x16e>;
                #gpio-range-cells = <0x3>;
                linux,phandle = <0x89>;
                pinctrl-names = "default";

                exp-header-pinmux {
                        phandle = <0x16e>;
                        linux,phandle = <0x16e>;

                        hdr40-pin21 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_wan6_ph1";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi1";
                                nvidia,pull = <0x1>;
                        };

                        hdr40-pin18 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_sen4_pv4";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi2";
                                nvidia,pull = <0x1>;
                        };

                        hdr40-pin24 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_wan8_ph3";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi1";
                                nvidia,pull = <0x1>;
                        };

                        hdr40-pin22 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_sen2_pv2";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi2";
                                nvidia,pull = <0x1>;
                        };

                        hdr40-pin19 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_wan7_ph2";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi1";
                                nvidia,pull = <0x1>;
                        };

                        hdr40-pin37 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_sen3_pv3";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi2";
                                nvidia,pull = <0x1>;
                        };

                        hdr40-pin23 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_wan5_ph0";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi1";
                                nvidia,pull = <0x1>;
                        };

                        hdr40-pin13 {
                                nvidia,enable-input = <0x1>;
                                nvidia,pins = "gpio_sen1_pv1";
                                nvidia,lpdr = <0x0>;
                                nvidia,tristate = <0x0>;
                                nvidia,function = "spi2";
                                nvidia,pull = <0x1>;
                        };
                };
5

After I added the content of pinmux to the device tree, I updated the device tree file of the system and transferred it to the owner. There is no spidev device under /dev, but I can see that the spi is open through jetson-io.py.

6

We want to skip jetson-io.py to configure spi and directly implement the spi function by updating the device tree, but it seems that after changing pinmux, it has no effect.

7

The /dev/spidev*.* need load the module manually.

sudo modprobe spidev

8

Thanks for your help, the spi function can be used normally.