What is differnce between Jetson-IO and manual PINMUX & device-tree configuration

OK.

Thanks to @ShaneCCC first.
Now I’m trying to configuration AGX for use SPI1 function.

Because ShaneCCC helps a lot, I can understand

  1. How to build custom kernel from kernel source.
  2. How to flash kernel without SDKmanager
  3. How to modify PINMUX using [Jetson_AGX_Series_DevKit_Pinmux_Configuration_Template.xlsm].

And I think the only one step left.
It is maybe configure device-tree for SPI.

But at this point, I was confused about setting AGX xavier.
Based on the document below, it said I don’t need to change PINMUX and Device-tree that if I use JETSON-IO.
[https://docs.nvidia.com/jetson/l4t/index.html#page/Tegra%20Linux%20Driver%20Package%20Development%20Guide%2Fhw_setup_jetson_io.html]

So, is it real that the time I spent for SPI(such as build kernel, make Pinmux, flash it …etc) is actually don’t needed if I use Jetson-io?

If your board can configure by jetson-io then you can just using jetson-io to configure the pin and don’t need to update the pinmux

How about device-tree?
Also don’t need to change?
I mean like this things shown in below.

spi@3210000 { compatible = “nvidia,tegra186-spi”; reg = <0x0 0x3210000 0x0 0x10000>; interrupts = <0x0 0x24 0x4>; #address-cells = <0x1>; #size-cells = <0x0>; iommus = <0x2 0x20>; dma-coherent; dmas = <0x1e 0xf 0x1e 0xf>; dma-names = “rx”, “tx”; spi-max-frequency = <0x3dfd240>; nvidia,clk-parents = “pll_p”, “clk_m”; clocks = <0x4 0x87 0x4 0x66 0x4 0xe>; clock-names = “spi”, “pll_p”, “clk_m”; resets = <0x5 0x5b>; reset-names = “spi”; status = “okay”; linux,phandle = <0x172>; phandle = <0x172>; spidev@0 {

Need to add spi@0 like below in which SPI controller you want to use.

 spi@xxxxx{
    compatible = "nvidia,tegra186-spi";
    reg = <0x0 0x3240000 0x0 0x10000>;
    ....
    ....
    ....
    linux,phandle = <0x80>;
    spi@0 {
      compatible = "spidev";
      reg = <0x0>;
      spi-max-frequency = <0x1312D00>;
      nvidia,enable-hw-based-cs;
      nvidia,cs-setup-clk-count = <0x1e>;
      nvidia,cs-hold-clk-count = <0x1e>;
      nvidia,rx-clk-tap-delay = <0x1f>;
      nvidia,tx-clk-tap-delay = <0x0>;
    }; 
 };

Okey.
It sounds sad. Hahahahahaha

I will try the way you told me.

Thanks!

Hi @ShaneCCC.

Can you tell me or re-direct me which file should I have to change to add that information?

I’ve check several post. But I can’t find which one is right file.

I found the folder
< /home/jhai/L4T_Source/Linux_for_Tegra/source/public/hardware/nvidia/platform/t19x/common/kernel-dts>
but… don’t know anymore…

Please can you tell me?

Thanks.

You can modify …/hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-p2888-0001-p2822-0000-common.dtsi

I found it.

I will use SPI1 So ‘spi@3210000’ is where I should modify.
but please can you explain why and how
‘compatible = “nvidia,tegra186-spi”;’ it works?

Because, at least as I know, tegra186 is code for TX2 board.
Do I need to change 186 to 194?

But most of this forum who use AGX xavier use ‘compatible = “nvidia,tegra186-spi”;’ .
Is it compatible?

For Xavier aka t194 use the tegra186-spi the same with TX2

1 Like