I need to activate sor1_hdmi_display but I can not find the dtsi file to activate it. I find tegra194-soc-base.dtsi file when I search sor2_hdmi_display. Do I need to activate this? But sor2 is also not activate in this file.
sor0: sor {
status = “disabled”;
compatible = “nvidia,tegra194-sor”;
reg = <0x0 0x15B00000 0x0 0x40000>;
nvidia,sor-ctrlnum = <0>;
nvidia,dpaux = <&dpaux0>;
nvidia,xbar-ctrl = <0x2 0x1 0x0 0x3 0x4>;
clocks = <&bpmp_clks TEGRA194_CLK_SOR0_REF>,
<&bpmp_clks TEGRA194_CLK_SOR_SAFE>,
<&bpmp_clks TEGRA194_CLK_SOR0_PAD_CLKOUT>,
<&bpmp_clks TEGRA194_CLK_SOR0_OUT>,
<&bpmp_clks TEGRA194_CLK_PLLDP>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_MAUD>,
<&bpmp_clks TEGRA194_CLK_HDA>,
<&bpmp_clks TEGRA194_CLK_HDA2CODEC_2X>,
<&bpmp_clks TEGRA194_CLK_HDA2HDMICODEC>;
clock-names = "sor0_ref", "sor_safe", "sor0_pad_clkout",
"sor0", "pll_dp", "pllp_out0",
"maud", "hda", "hda2codec_2x",
"hda2hdmi";
resets = <&bpmp_resets TEGRA194_RESET_SOR0>,
<&bpmp_resets TEGRA194_RESET_HDA>,
<&bpmp_resets TEGRA194_RESET_HDA2CODEC_2X>,
<&bpmp_resets TEGRA194_RESET_HDA2HDMICODEC>;
reset-names = "sor0","hda_rst", "hda2codec_2x_rst",
"hda2hdmi_rst";
sor0_hdmi_display: hdmi-display {
compatible = "hdmi,display";
status = "disabled";
};
sor0_dp_display: dp-display {
compatible = "dp, display";
status = "disabled";
};
}; //sor
sor1: sor1 {
status = "disabled";
compatible = "nvidia,tegra194-sor";
reg = <0x0 0x15B40000 0x0 0x40000>;
nvidia,sor-ctrlnum = <1>;
nvidia,dpaux = <&dpaux1>;
nvidia,xbar-ctrl = <0x2 0x1 0x0 0x3 0x4>;
clocks = <&bpmp_clks TEGRA194_CLK_SOR1_REF>,
<&bpmp_clks TEGRA194_CLK_SOR_SAFE>,
<&bpmp_clks TEGRA194_CLK_SOR1_PAD_CLKOUT>,
<&bpmp_clks TEGRA194_CLK_SOR1_OUT>,
<&bpmp_clks TEGRA194_CLK_PLLDP>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_MAUD>,
<&bpmp_clks TEGRA194_CLK_HDA>,
<&bpmp_clks TEGRA194_CLK_HDA2CODEC_2X>,
<&bpmp_clks TEGRA194_CLK_HDA2HDMICODEC>;
clock-names = "sor1_ref", "sor_safe", "sor1_pad_clkout",
"sor1", "pll_dp", "pllp_out0",
"maud", "hda", "hda2codec_2x",
"hda2hdmi";
resets = <&bpmp_resets TEGRA194_RESET_SOR1>,
<&bpmp_resets TEGRA194_RESET_HDA>,
<&bpmp_resets TEGRA194_RESET_HDA2CODEC_2X>,
<&bpmp_resets TEGRA194_RESET_HDA2HDMICODEC>;
reset-names = "sor1","hda_rst", "hda2codec_2x_rst",
"hda2hdmi_rst";
sor1_hdmi_display: hdmi-display {
compatible = "hdmi,display";
status = "disabled";
};
sor1_dp_display: dp-display {
compatible = "dp, display";
status = "disabled";
};
}; //sor1
sor2: sor2 {
status = "disabled";
compatible = "nvidia,tegra194-sor";
reg = <0x0 0x15B80000 0x0 0x40000>;
nvidia,sor-ctrlnum = <2>;
nvidia,dpaux = <&dpaux2>;
nvidia,xbar-ctrl = <0x2 0x1 0x0 0x3 0x4>;
clocks = <&bpmp_clks TEGRA194_CLK_SOR2_REF>,
<&bpmp_clks TEGRA194_CLK_SOR_SAFE>,
<&bpmp_clks TEGRA194_CLK_SOR2_PAD_CLKOUT>,
<&bpmp_clks TEGRA194_CLK_SOR2_OUT>,
<&bpmp_clks TEGRA194_CLK_PLLDP>,
<&bpmp_clks TEGRA194_CLK_PLLP_OUT0>,
<&bpmp_clks TEGRA194_CLK_MAUD>,
<&bpmp_clks TEGRA194_CLK_HDA>,
<&bpmp_clks TEGRA194_CLK_HDA2CODEC_2X>,
<&bpmp_clks TEGRA194_CLK_HDA2HDMICODEC>;
clock-names = "sor2_ref", "sor_safe", "sor2_pad_clkout",
"sor2", "pll_dp", "pllp_out0",
"maud", "hda", "hda2codec_2x",
"hda2hdmi";
resets = <&bpmp_resets TEGRA194_RESET_SOR2>,
<&bpmp_resets TEGRA194_RESET_HDA>,
<&bpmp_resets TEGRA194_RESET_HDA2CODEC_2X>,
<&bpmp_resets TEGRA194_RESET_HDA2HDMICODEC>;
reset-names = "sor2","hda_rst", "hda2codec_2x_rst",
"hda2hdmi_rst";
sor2_hdmi_display: hdmi-display {
compatible = "hdmi,display";
status = "disabled";
};
sor2_dp_display: dp-display {
compatible = "dp, display";
status = "disabled";
};
}; //sor2