On the X200 carrier board DP2 is connected to the standard HDMI out connector (same as dev kit). This works fine.
In addition we have connected the DP1 port to a second HDMI connector. We would like to enable this one, but we are not successful. On the dev kit DP1 is muxed onto a USB-C connector.
We have edited the device tree file with the changes below. We have changed 2 lines in the sor1 definition.
Question: how do we enable the 2nd output and how can we test it? I would think that we can just connect a second HDMI monitor and configure it with the display settings dialog in Ubuntu.
...
sor1 {
status = "okay";
compatible = "nvidia,tegra194-sor";
reg = <0x0 0x15b40000 0x0 0x40000>;
nvidia,sor-ctrlnum = <0x1>;
nvidia,dpaux = <0x7d>;
nvidia,xbar-ctrl = <0x2 0x1 0x0 0x3 0x4>;
clocks = <0x4 0x81 0x4 0x83 0x4 0x82 0x4 0x80 0x4 0x62 0x4 0x66 0x4 0x47 0x4 0x2b 0x4 0x2c 0x4 0x2d>;
clock-names = "sor1_ref", "sor_safe", "sor1_pad_clkout", "sor1", "pll_dp", "pllp_out0", "maud", "hda", "hda2codec_2x", "hda2hdmi";
resets = <0x5 0x58 0x5 0x14 0x5 0x15 0x5 0x16>;
reset-names = "sor1", "hda_rst", "hda2codec_2x_rst", "hda2hdmi_rst";
pad-controllers = <0x7a 0x19>;
pad-names = "hdmi-dp1";
nvidia,hpd-gpio = <0x12 0x61 0x0>;
nvidia,ddc-i2c-bus = <0x7e>;
nvidia,active-panel = <0x7f>;
nvidia,typec-port = [01];
linux,phandle = <0x78>;
phandle = <0x78>;
hdmi-display {
compatible = "hdmi,display";
<b>status = "okay";</b>
generic-infoframe-type = <0x87>;
linux,phandle = <0x1ae>;
phandle = <0x1ae>;
disp-default-out {
nvidia,out-type = <0x1>;
nvidia,out-hotplug-state = <0x0>;
nvidia,out-parent-clk = "plld2";
nvidia,out-xres = <0x1000>;
nvidia,out-yres = <0x870>;
};
};
dp-display {
compatible = "dp, display";
<b>status = "disabled";</b>
nvidia,is_ext_dp_panel = <0x1>;
nvidia,pc2-disabled;
linux,phandle = <0x7f>;
phandle = <0x7f>;
disp-default-out {
nvidia,out-type = <0x3>;
nvidia,out-hotplug-state = <0x0>;
nvidia,out-parent-clk = "plld2";
nvidia,out-xres = <0x1000>;
nvidia,out-yres = <0x870>;
};
lt-data {
tegra-dp-vs-regs {
pc2_l0 = <0x15 0x1c 0x23 0x2d 0x20 0x27 0x2f 0x2c 0x36 0x3c>;
pc2_l1 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l2 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l3 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};
tegra-dp-pe-regs {
pc2_l0 = <0x0 0xc 0x1a 0x2f 0x0 0x10 0x22 0x1 0x19 0x0>;
pc2_l1 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l2 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l3 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};
tegra-dp-pc-regs {
pc2_l0 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l1 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l2 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l3 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};
tegra-dp-tx-pu {
pc2_l0 = <0x20 0x30 0x40 0x60 0x30 0x40 0x60 0x40 0x60 0x60>;
pc2_l1 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l2 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
pc2_l3 = <0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>;
};
};
};
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