the PICE0 (c4 x4) is connected to XILINX FPGA GTX BANK(A7-1000/X0Y0),but this is necessory that GPU(ORIN NX 16G) need to load the FPGA, then ,we can find that the GPU cannot find the PCIE0 device when the board is powered, because the pcie0 enter to low-power mode before the GPU to load the FPGA.
here ,
1)How to awake the PCIE0 device after the GPU to load the FPGA ?
2)If it is possible that the PCIE is also non-low-power mode, then how to set?
please help to tell me.
when booting, we can find pcie0_clkp/n, that means pcie scan device
after boot complete, we can not find pcie0_clkp/n of pcie, I think pcie0 enter low-power mode.
now download the FPGA firmware,still cannot find the pcie device.
we did a test that download FPGA when booting, and foud that pci0 can find device.
so i want to know how to prevent pcie0 to enter low-power mode
after boot completed, there is no pcie device node, so can not use sysfs to rescan and rebind.