The Jetson Nano Display Controller Complex integrates a MIPI-DSI interface and Serial Output Resource (SOR). The MIPI-DSI interface contains one Clock Lane and two Data Lanes. But I found that the most of LCD modules in our market have a different MIPI-DSI interface which contains one Clock Lane and four Data Lanes.
In your demo, the MIPI-DSI interface is only used as testpoints. So I want know how to use the MIPI-DSI interface on your Jetson Nano to connect LCD modules. Can you show me a schematic design demo to explain that. Thanks!
Hi, as you can see in Product Design Gudie: Tegra supports two total MIPI DSI data lanes and a single clock lane. Each data lane has a peak bandwidth up to 1.5Gbps.
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