How to use the patch to fix GPIO pins stuck on 0V for jetson orin nano

Hello,

I have been trying to use a gpio pin with my jetson orin nano board with the 40 pins extension but after 2 days I discovered the problem from the kernal and there is a patch to fix it. however, I dont know how to use the patch as I never compiled a kernal before.

here is the link for the question and the patch: 40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF

Any suggestion how to proceed or how to use the patch? and if there is an easier way to use a gpio, I just need one pin as gpio.
Here is my system info:

R36 (release), REVISION: 4.7, GCID: 42132812, BOARD: generic, EABI: aarch64, DATE: Thu Sep 18 22:54:44 UTC 2025 # KERNEL_VARIANT: oot

Thank you.

Hi tahaalars94,

Please refer to Kernel Customization — NVIDIA Jetson Linux Developer Guide for the steps to build kernel source.

Or you can simply update the Jetpack 6.2.2(r36.5) which should have the fix.

What’s the exact pin you want to use as GPIO?

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@KevinFFF
I have now R36.4 how to update to R36.5 without losing any data? Can I with the SDK or what is your opinion?
Also, I want to use any GPIO pin with 3.3v that changed between 0V and 3.3v no specific pin is needed. is there any gpio pin works now without updating? I tried 15,7,33 non of them toggled “worked“ as intended.

What data do you mean in rootfs?
You can perform image-based OTA update with specifying the path to be preserved.

Or you can just apply the patch manually and update the kernel image only.
The fix is for tegra pinctrl driver so it applies to all GPIO pins.

To use the pin as GPIO and control the pin state High/Low, you need to:

  1. configure the pinmux with GPIO/Output/Drive 0 (you can flash QSPI only to prevent losing custom data in rootfs)
  2. apply the patch from 40hdr - SPI1 gpio padctl register bit[10] effect by gpiod tools in JP6 - #20 by KevinFFF
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I updated to R36.5 and configured Jetson-io and now it works, thank you

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