How to use the WM8904 codec in Jetson AGX Xavier?

Version: R35.1
Linux: 20.04
Through the HDMI external display, use the WM8904 codec to emit sound. How do I modify the device tree? Because I followed the tutorial to change it and it didn’t work out, I want to get some help, thank you. Here is my device tree modification file:
tegra194-audio-p2822-0000.dtsi (14.9 KB)
Modified path:
hardware/nvidia/platform/t19x/galen/kernel-dts/common/tegra194-audio-p2822-0000.dtsi/
Reference:https://docs.nvidia.com/jetson/archives/r35.1/DeveloperGuide/text/SD/Communications/AudioSetupAndDevelopment.html#device-tree-configuration-for-a-custom-audio-card

I’m also working on tegra_machine_driver.c file to modify as follows:

static int tegra_machine_wm8904_init(struct snd_soc_pcm_runtime *rtd)
{
	struct device *dev = rtd->card->dev;
	int err;
	err = snd_soc_dai_set_sysclk(rtd->codec_dai, WM8904_CLK_MCLK, 12288000,
								 SND_SOC_CLOCK_IN);
	if (err)
	{
		dev_err(dev, "failed to wm8904 sysclk !\n");
		return err;
	}
	return 0;
}
static int codec_init(struct tegra_machine *machine)
{
	struct snd_soc_dai_link *dai_links = machine->asoc->dai_links;
	unsigned int num_links = machine->asoc->num_links, i;

	if (!dai_links || !num_links)
		return -EINVAL;

	for (i = 0; i < num_links; i++)
	{
		if (!dai_links[i].name)
			continue;

		if (strstr(dai_links[i].name, "rt565x-playback") ||
			strstr(dai_links[i].name, "rt565x-codec-sysclk-bclk1"))
			dai_links[i].init = tegra_machine_rt565x_init;
		else if (strstr(dai_links[i].name, "fe-pi-audio-z-v2"))
			dai_links[i].init = tegra_machine_fepi_init;
		else if (strstr(dai_links[i].name, "respeaker-4-mic-array"))
			dai_links[i].init = tegra_machine_respeaker_init;
		else if (strstr(dai_links[i].name, "wm8904-playback"))
			dai_links[i].init = tegra_machine_wm8904_init;
	}

	return 0;
}

And refer to the modification of kconfig file:

config SND_SOC_TEGRA210_AUDIO
	tristate "SoC Audio support for Tegra210"
	depends on I2C
	depends on ARCH_TEGRA_210_SOC || ARCH_TEGRA_18x_SOC
	select SND_SOC_RT5659
	select SND_SOC_TAS2552
	select SND_SOC_SGTL5000
	select SND_SOC_WM8904

Here’s a related topic I searched for:https://forums.developer.nvidia.com/t/problem-seeing-i2c-device-on-my-carrier-please-look-over-my-dts-changes/81932/4

The control pin of WM8904 Codec and Jetson: I2C
the corresponding device tree node is: i2c@c250000
➜ ~ sudo i2cdetect -y -r -a 7
0 1 2 3 4 5 6 7 8 9 a b c d e f
00: – – – – – – – – – – – – – – – –
10: – – – – – – – – – – 1a – – – – –
20: – – – – – – – – – – – – – – – –
30: – – – – – – – – – – – – – – – –
40: – – – – – – – – – – – – – – – –
50: – – – – – – – – – – – – – – – 5f
60: – – – – – – – – – – – – – – – –
70: – – – – – – – – – – – – – – – –

WM8904 Device Address: 0x1a
and the data interface: I2S1

I learned that ASoC is divided into Machine, Platform and Codec three parts, of which the Machine driver is responsible for the coupling between Platform and Codec and some and device- or board-specific code, again referencing the content of the previous section: the Machine driver is responsible for handling some machine-specific controls and audio events (for example, when playing audio, you need to turn on an amplifier first); Platform and Codec drivers alone will not work, it must be combined by the Machine driver to complete the audio processing of the entire device.

Check I2C communication & codecs probe:

➜  ~ sudo cat /sys/bus/i2c/devices/7-001a/uevent
[sudo] password for nvidia: 
OF_NAME=rt5659.7-001a
OF_FULLNAME=/i2c@c250000/rt5659.7-001a@1a
OF_COMPATIBLE_0=realtek,rt5658
OF_COMPATIBLE_N=1
MODALIAS=of:Nrt5659.7-001aT(null)Crealtek,rt5658

I have modified the device tree to wm8904, but the check result is rt5658,why?

	i2c@c250000 {
		//add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;
			clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			// clocks = <&pck0>;
			clock-names = "mclk";
		};

Hi,
A user has enabled it on TX2 NX. You may refer to this topic and give it a try:
WM8904 audio driver support for Jetson TX2 NX

Besides, FE-PI audio v2 board is supported in 40-pin expansion header. You can enable it through jetson-io.py and refer to the device tree. To check which part has to be modified in device tree.

I also refer to this topic, and I also modified it according to it, but the wm8904 codec was not configured successfully, Check I2C communication & codecs probe:

➜  ~ sudo cat /sys/bus/i2c/devices/7-001a/uevent
[sudo] password for nvidia: 
OF_NAME=rt5659.7-001a
OF_FULLNAME=/i2c@c250000/rt5659.7-001a@1a
OF_COMPATIBLE_0=realtek,rt5658
OF_COMPATIBLE_N=1
MODALIAS=of:Nrt5659.7-001aT(null)Crealtek,rt5658

@DaneLLL ,thank you

// SPDX-License-Identifier: GPL-2.0-only
/*

  • T194 p2822-0000 audio common DTSI file.
  • Copyright (c) 2017-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.

*/

#include <audio/tegra-platforms-audio-dai-links.dtsi>
#include <audio/tegra186-audio-dai-links.dtsi>
#include <audio/tegra186-audio-graph.dtsi>
#include <dt-bindings/gpio/tegra194-gpio.h>
#include <dt-bindings/audio/tegra194-audio.h>
#include <audio/tegra-platforms-audio-dmic3-5-switch.dtsi>

/ {

	aconnect@2a41000 {
		status = "okay";

		agic-controller@2a41000 {
			status = "okay";
		};

		adsp@2993000 {
			status = "okay";
		};
	};
	//add
	clocks {
		wm8904_mclk: wm8904_mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		// clock-frequency = <49152000>;
		clock-frequency = <12288000>;
		clock-output-names = "wm8904-mclk";
		status = "okay";
		};
	};
// 	nvidia,dai-link-1 {
// 		link-name = "wm8904-playback";
// 		cpu-dai = <&tegra_i2s1>;
// 		codec-dai = <&wm8904>;
// 		cpu-dai-name = "I2S1";
// 		codec-dai-name = "wm8904-hifi";
// 		format = "i2s";
// 		bitclock-slave;
// 		frame-slave;
// 		bitclock-noninversion;
// 		frame-noninversion;
// 		bit-format = "s16_le";
// 		bclk_ratio = <0>;
// 		srate = <48000>;
// 		num-channel = <2>;
// 		ignore_suspend;
// 		name-prefix = "x";
// 		status = "okay";
// };
	i2c@c250000 {
		//add
		wm8904_codec: wm8904@1a {
			compatible = "wlf,wm8904";
			status ="okay";
			reg = <0x1a>;
			clocks = <&wm8904_mclk>;
			// clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
			// clocks = <&pck0>;
			clock-names = "mclk";
		};
		// rt5658: rt5659.7-001a@1a {
		// 	compatible = "realtek,rt5658";
		// 	reg = <0x1a>;

		// 	/* refer include/sound/rt5659.h for the values to be used */
		// 	realtek,jd-src = <2>; /* RT5659_JD_HDA_HEADER */
		// 	realtek,dmic1-data-pin = <0>; /* RT5659_DMIC1_NULL */
		// 	realtek,dmic2-data-pin = <0>; /* RT5659_DMIC2_NULL */

		// 	/* Codec IRQ output */
		// 	interrupt-parent = <&tegra_main_gpio>;
		// 	interrupts = <TEGRA194_MAIN_GPIO(S, 5) GPIO_ACTIVE_HIGH>;

		// 	clocks = <&bpmp TEGRA194_CLK_AUD_MCLK>;
		// 	clock-names = "mclk";

		// 	#sound-dai-cells = <1>;

		// 	sound-name-prefix = "CVB-RT";

		// 	status = "okay";

		// 	port {
		// 		rt5658_ep: endpoint {
		// 			remote-endpoint = <&i2s1_dap_ep>;
		// 			mclk-fs = <256>;
		// 			link-name = "rt565x-playback";
		// 		};
		// 	};
		// };
	};

	/* Default for all I2S is long fsync width(31) */
	aconnect@2a41000 {
		compatible = "nvidia,tegra210-aconnect";
    	status = "okay";
		ahub {
			/* I2S4 in Short frame sync for BT SCO */
			i2s@2901300 {
				bclk-ratio = <4>;
				status = "okay";
			};
		};
		// tegra_axbar: ahub {
		// 	compatible = "nvidia,tegra186-ahub";
		// 	status = "okay";
			
		// 	tegra_i2s1: i2s@2901000 {
		// 		compatible = "nvidia,tegra210-i2s";
		// 		reg = <0x0 0x2901000 0x0 0x100>;
		// 		clocks = <&bpmp_clks TEGRA194_CLK_I2S1>,
		// 			<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
		// 			<&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>,
		// 			<&bpmp_clks TEGRA194_CLK_SYNC_I2S1>,
		// 			<&bpmp_clks TEGRA194_CLK_I2S1_SYNC_INPUT>;
		// 		clock-names = "i2s","pll_a_out0", "ext_audio_sync","audio_sync", "clk_sync_input";
		// 		assigned-clocks = <&bpmp_clks TEGRA194_CLK_I2S1>;
		// 		assigned-clock-parents =
		// 			<&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		// 		assigned-clock-rates = <1536000>;
		// 		fsync-width = <31>;
		// 		#sound-dai-cells = <1>;
		// 		sound-name-prefix = "I2S1";
		// 		status = "okay";
		// 	};
		// 	tegra_dmic1: dmic@2904000 {
        //     compatible = "nvidia,tegra210-dmic";
        //     reg = <0x0 0x2904000 0x0 0x100>;
        //     clocks = <&bpmp_clks TEGRA194_CLK_DMIC1>,
        //              <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
        //     clock-names = "dmic", "pll_a_out0";
        //     assigned-clocks = <&tegra_car TEGRA194_CLK_DMIC1>;
        //     assigned-clock-parents =
        //                 <&tegra_car TEGRA194_CLK_PLLA_OUT0>;
        //     assigned-clock-rates = <3072000>;
        //     #sound-dai-cells = <1>;
        //     sound-name-prefix = "DMIC1";
        //     status = "okay";
        // };
		// tegra_dspk1: dspk@2905000 {
        //     compatible = "nvidia,tegra186-dspk";
        //     reg = <0x0 0x2905000 0x0 0x100>;
        //     clocks = <&bpmp_clks TEGRA194_CLK_DSPK1>,
        //             <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
        //             <&bpmp_clks TEGRA194_CLK_SYNC_DSPK1>;
        //     clock-names = "dspk", "pll_a_out0", "sync_dspk";
        //     assigned-clocks = <&tegra_car TEGRA194_CLK_DSPK1>;
        //     assigned-clock-parents =
        //             <&tegra_car TEGRA194_CLK_PLLA_OUT0>;
        //     assigned-clock-rates = <3072000>;
        //     #sound-dai-cells = <1>;
        //     sound-name-prefix = "DSPK1";
        //     status = "okay";
        // };
			
		// };
	};

	tegra_acsl_audio: acsl_audio {
		status = "okay";
	};

	hda@3510000 {
		status = "okay";

		nvidia,model = "NVIDIA Jetson AGX Xavier HDA";
	};

	tegra_sound: sound {
		status = "okay";
		compatible = "nvidia,tegra186-ape";
		nvidia-audio-card,name = "NVIDIA Jetson AGX Xavier APE";
		nvidia,num-codec-link = <1>;
		nvidia,num-clk = <6>;
		nvidia,clk-rates = < 270950400  /* PLLA_x11025_RATE */
								11289600   /* AUD_MCLK_x11025_RATE */
								45158400   /* PLLA_OUT0_x11025_RATE */
								45158400   /* AHUB_x11025_RATE */
								245760000  /* PLLA_x8000_RATE */
								12288000   /* AUD_MCLK_x8000_RATE */
								49152000   /* PLLA_OUT0_x8000_RATE */
								49152000 >;/* AHUB_x8000_RATE */
		nvidia,xbar = <&tegra_axbar>;
		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>,
			 <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		clock-names = "pll_a", "pll_a_out0", "extern1";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		nvidia-audio-card,widgets =
		    "Headphone",    "H40-SGTL Headphone",
			"Microphone",   "H40-SGTL Mic",
			"Line",         "H40-SGTL Line In",
			"Line",         "H40-SGTL Line Out",
			"Headphone",	"CVB-RT Headphone Jack",
			"Microphone",	"CVB-RT Mic Jack",
			"Speaker",	"CVB-RT Int Spk",
			"Microphone",	"CVB-RT Int Mic";
		//add
		nvidia-audio-card,routing =
		    "H40-SGTL Headphone",   "H40-SGTL HP_OUT",
			"H40-SGTL MIC_IN",      "H40-SGTL Mic",
			"H40-SGTL ADC",         "H40-SGTL Mic Bias",
			"H40-SGTL LINE_IN",     "H40-SGTL Line In",
			"H40-SGTL Line Out",    "H40-SGTL LINE_OUT",
			"x Headphone", "x HPOUTL",
    		"x Headphone", "x HPOUTR",
			"CVB-RT Headphone Jack",     "CVB-RT HPO L Playback",
			"CVB-RT Headphone Jack",     "CVB-RT HPO R Playback",
			"CVB-RT IN1P",               "CVB-RT Mic Jack",
			"CVB-RT IN2P",               "CVB-RT Mic Jack",
			"CVB-RT Int Spk",            "CVB-RT SPO Playback",
			"CVB-RT DMIC L1",            "CVB-RT Int Mic",
			"CVB-RT DMIC L2",            "CVB-RT Int Mic",
			"CVB-RT DMIC R1",            "CVB-RT Int Mic",
			"CVB-RT DMIC R2",            "CVB-RT Int Mic";

		nvidia-audio-card,mclk-fs = <256>;
		nvidia,dai-link-1 {
                    link-name = "wm8904-playback";
                    cpu-dai = <&tegra_i2s1>;
                    codec-dai = <&wm8904_codec>;
                    cpu-dai-name = "I2S1";
                    codec-dai-name = "wm8904-hifi";
                    format = "i2s";
                    bitclock-slave;
                    frame-slave;
                    bitclock-noninversion;
                    frame-noninversion;
                    bit-format = "s16_le";
                    bclk_ratio = <0>;
                    srate = <48000>;
                    num-channel = <2>;
                    ignore_suspend;
                    // name-prefix = "x";
                    status = "okay";
            };
	};

	tegra_sound_graph: sound_graph {
		compatible = "nvidia,tegra186-audio-graph-card";

		/*
		 * Tegra audio graph card is based on uptream generic audio
		 * graph sound card. In future there is plan to use this
		 * as default sound card.
		 */
		status = "disabled";

		dais = /* ADMAIF (FE) Ports */
		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
		       <&admaif10_port>, <&admaif11_port>, <&admaif12_port>,
		       <&admaif13_port>, <&admaif14_port>, <&admaif15_port>,
		       <&admaif16_port>, <&admaif17_port>, <&admaif18_port>,
		       <&admaif19_port>, <&admaif20_port>,

		       /* ADSP (FE) Ports */
		       <&adsp_pcm1_port>, <&adsp_pcm2_port>,
		       <&adsp_compr1_port>, <&adsp_compr2_port>,

		       /* XBAR I/O ports */
		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_i2s6_port>,

		       <&xbar_dmic1_port>, <&xbar_dmic2_port>,
		       <&xbar_dmic3_port>, <&xbar_dmic4_port>,

		       <&xbar_dspk1_port>, <&xbar_dspk2_port>,

		       /* XBAR HW accelerator ports */
		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,

		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,

		       <&xbar_afc1_in_port>, <&xbar_afc2_in_port>,
		       <&xbar_afc3_in_port>, <&xbar_afc4_in_port>,
		       <&xbar_afc5_in_port>, <&xbar_afc6_in_port>,

		       <&xbar_asrc_in1_port>, <&xbar_asrc_in2_port>,
		       <&xbar_asrc_in3_port>, <&xbar_asrc_in4_port>,
		       <&xbar_asrc_in5_port>, <&xbar_asrc_in6_port>,
		       <&xbar_asrc_in7_port>, <&xbar_arad_port>,

		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,

		       <&xbar_ope1_in_port>,

		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
		       <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>,
		       <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>,
		       <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>,
		       <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>,

		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
		       <&xbar_adx3_in_port>, <&xbar_adx4_in_port>,

		       /* BE I/O Ports */
		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>,
		       <&i2s4_port>, <&i2s5_port>, <&i2s6_port>,

		       <&dmic1_port>, <&dmic2_port>, <&dmic3_port>,
		       <&dmic4_port>,

		       <&dspk1_port>, <&dspk2_port>,

		       /* BE HW accelerator ports */
		       <&sfc1_out_port>, <&sfc2_out_port>,
		       <&sfc3_out_port>, <&sfc4_out_port>,

		       <&mvc1_out_port>, <&mvc2_out_port>,

		       <&afc1_out_port>, <&afc2_out_port>,
		       <&afc3_out_port>, <&afc4_out_port>,
		       <&afc5_out_port>, <&afc6_out_port>,

		       <&asrc_out1_port>, <&asrc_out2_port>,
		       <&asrc_out3_port>, <&asrc_out4_port>,
		       <&asrc_out5_port>, <&asrc_out6_port>,

		       <&mixer_out1_port>, <&mixer_out2_port>,
		       <&mixer_out3_port>, <&mixer_out4_port>,
		       <&mixer_out5_port>,

		       <&ope1_out_port>,

		       <&amx1_out_port>, <&amx2_out_port>,
		       <&amx3_out_port>, <&amx4_out_port>,

		       <&adx1_out1_port>, <&adx1_out2_port>,
		       <&adx1_out3_port>, <&adx1_out4_port>,
		       <&adx2_out1_port>, <&adx2_out2_port>,
		       <&adx2_out3_port>, <&adx2_out4_port>,
		       <&adx3_out1_port>, <&adx3_out2_port>,
		       <&adx3_out3_port>, <&adx3_out4_port>,
		       <&adx4_out1_port>, <&adx4_out2_port>,
		       <&adx4_out3_port>, <&adx4_out4_port>,

		       /* ADSP related ports */
		       <&adsp_admaif1_port>, <&adsp_admaif2_port>,
		       <&adsp_admaif3_port>, <&adsp_admaif4_port>,
		       <&adsp_admaif5_port>, <&adsp_admaif6_port>,
		       <&adsp_admaif7_port>, <&adsp_admaif8_port>,
		       <&adsp_admaif9_port>, <&adsp_admaif10_port>,
		       <&adsp_admaif11_port>, <&adsp_admaif12_port>,
		       <&adsp_admaif13_port>, <&adsp_admaif14_port>,
		       <&adsp_admaif15_port>, <&adsp_admaif16_port>,
		       <&adsp_admaif17_port>, <&adsp_admaif18_port>,
		       <&adsp_admaif19_port>, <&adsp_admaif20_port>,

		       <&admaif1_codec_port>, <&admaif2_codec_port>,
		       <&admaif3_codec_port>, <&admaif4_codec_port>,
		       <&admaif5_codec_port>, <&admaif6_codec_port>,
		       <&admaif7_codec_port>, <&admaif8_codec_port>,
		       <&admaif9_codec_port>, <&admaif10_codec_port>,
		       <&admaif11_codec_port>, <&admaif12_codec_port>,
		       <&admaif13_codec_port>, <&admaif14_codec_port>,
		       <&admaif15_codec_port>, <&admaif16_codec_port>,
		       <&admaif17_codec_port>, <&admaif18_codec_port>,
		       <&admaif19_codec_port>, <&admaif20_codec_port>;

		label = "NVIDIA Jetson AGX Xavier APE";

		clocks = <&bpmp_clks TEGRA194_CLK_PLLA>,
			 <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;
		clock-names = "pll_a", "plla_out0";
		assigned-clocks = <&bpmp_clks TEGRA194_CLK_AUD_MCLK>;
		assigned-clock-parents = <&bpmp_clks TEGRA194_CLK_PLLA_OUT0>;

		widgets = "Headphone",	"CVB-RT Headphone Jack",
			  "Microphone", "CVB-RT Mic Jack",
			  "Speaker",	"CVB-RT Int Spk",
			  "Microphone", "CVB-RT Int Mic";

		routing = "CVB-RT Headphone Jack", "CVB-RT HPO L Playback",
			  "CVB-RT Headphone Jack", "CVB-RT HPO R Playback",
			  "CVB-RT IN1P",	   "CVB-RT Mic Jack",
			  "CVB-RT IN2P",	   "CVB-RT Mic Jack",
			  "CVB-RT Int Spk",	   "CVB-RT SPO Playback",
			  "CVB-RT DMIC L1",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC L2",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC R1",	   "CVB-RT Int Mic",
			  "CVB-RT DMIC R2",	   "CVB-RT Int Mic";

		/*
		 * For codec2codec based DAI link design this is required.
		 * For DPCM based design, this is optional and instead
		 * it will be picked from codec port node.
		 */
		mclk-fs = <256>;
	};
};

/*
 * Default config for all I2S dai links are
 * format = "i2s", bitclock-slave, frame-slave,
 * bitclock-noninversion, frame-noninversion,
 * Any change from default needs override on
 * platform specific files.
 */

/* Override with Codec entries */
&i2s1_to_codec {
	link-name = "wm8904-playback";
	// link-name = "rt5658-playback";
	bitclock-master;
    frame-master;
	codec {
		sound-dai = <&wm8904_codec 0>;
		prefix = "H40-SGTL";
		// prefix = "CVB-RT";
	};
	// //add
	// link-name = "Playback";
	// cpu-dai = <&tegra_i2s1>;
	// codec-dai = <&wm8904>;
	// cpu-dai-name = "I2S1";
	// codec-dai-name = "wm8904-hifi";
	// format = "i2s";
	// bitclock-slave;
	// frame-slave;
	// bitclock-noninversion;
	// frame-noninversion;
	// bit-format = "s16_le";
	// bclk_ratio = <0>;
	// srate = <48000>;
	// num-channel = <2>;
	// ignore_suspend;
	// name-prefix = "x";
	// status = "okay";
};

hdr40_snd_link_i2s: &i2s2_to_codec { };

/* Override with BT SCO entries */
&i2s4_to_codec {
	format = "dsp_a";
	bitclock-inversion;
};

/* Audio graph related bindings */
// &i2s1_dap_ep {
// 	// remote-endpoint = <&rt5658_ep>;
// 	dai-format = "dsp_a";
// 	bitclock-inversion;
// };
&i2s2_to_codec {
    bitclock-master;
    frame-master;
};
&i2s4_dap_ep {
	dai-format = "dsp_a";
	bitclock-inversion;
};

hdr40_snd_i2s_dap_ep: &i2s2_dap_ep { };
````Preformatted text`

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