Hi all,
For simulation purpose I was wondering if some IBIS model of the Tegra K1 is available or has been made by the community ?
Have a nice day
Which interface are you interest in?
It is aimed to simulate signals integrity on Hyperlynx
I asked for a TK1 IBIS model almost a year ago but NVIDIA didn’t supply it at that time.
I am also interested in receiving an ibis model for the Tegra K1.
I need to run a simulation with Hyperlynx for the DDR3L interface.
Hi Hans, Artsiom is here :)
As I designed this board (www.cct.co.uk/sheets/AG/aga1xm1d.htm) based on four Tegra K1 chips about half a year ago I can describe NVIDIA’s approach to Tegra K1 external memory interface validation: it’s terrible.
Naturally I’ve asked their UK FAE for an IBIS model to do pre- and post-layout SI simulations but he told they didn’t have any IBIS model available. Maybe the situation has changed in the last several months.
What they said we need to do is to deviate from Jetson TK1 memory layout as less as possible and then run their so called “Shmoo” test (Tegra K1 Memory Characterization, see the last item here: Hardware Design and Development | NVIDIA Developer ). What it does is that it runs a set of memory tests and adjusts Tegra K1 memory controller parameters for the best result (timings, slew rates etc). Running this test is quite a convoluted exercise. Basically it’s a bunch of binaries, scripts and Excel spreadsheets that a HW designer would need to run in certain sequence, export/import and process data and then select the best memory controller configuration which in turn is placed in the Boot Configuration Table of your boot device so these settings get applied on every boot. Oh, and to run Shmoo test you’d need this board too: PhidgetInterfaceKit 0/0/4 - 1014_2B at Phidgets
Overall is a very cumbersome process with a lot of manual steps. Besides it’s made for Jetson TK1 so using it on a custom design is even more tricky.
As a crude workaround you might export Tegra K1 die-to-ball lengths from Jetson TK1 PCB layout (which is done in Cadence Allegro) but it’s not the same as having a proper IBIS model.
Thanks for your feedback cioma. It’s cool to meet the designer of the quad ATCA board (with SRIO!). As someone who has also shmoo’d, I can identify where you’re coming from. Trust that we understand your request and are trying to improve IBIS modeling in the future.
Thanks dusty, it’s great to be heard, apologies if I was too straight-forward :)
Indeed, nowadays having a good quality IBIS and/or HSPICE model for Signal Integrity simulations is almost a prerequisite and not having one might even be a decision point of whether to use a particular SoC or not.
Another big challenge for me was AS3722 PMU: because our application (AMC board) was very different to the Jetson TK1 I couldn’t use any of the PMUs with preprogrammed OTP (defined by NVIDIA). So I went on and used AS3722 with blank OTP, studied its internals, wrote my bring-up and validation code in Python, tested it and generated our custom power-on sequence and other settings that get programmed on every power-on over I2C by a small housekeeping microcontroller that we have onboard. I’ve described it in more details in this topic: https://devtalk.nvidia.com/default/topic/808021/how-to-burn-as3722-pmu-otp-in-system-/
So if you have any PMU-related questions deviating from Jetson design - feel free to either PM me or open a public topic.
Hi guys,
I am facing OTP problem of AS3722. AS3722 is blank and brand new. Our situation is that we have developed our custom board based on tegra k1 and adapted AS3722 as a main pmu. Now we assembled the board and few pcs of samples ready on hand. AS3722 is exact same model with Nvidia Jetson Tegra K1 without OTP. As per cioma’s suggestion, we tried to connect with the AS3722 via I2C from Ardiuno Nano and UNO (we tried to communicate at 100kHz and 400kHz connection speed). VDD_GPIO_lv = 1.8V VSUP_GPIO = 3.7V Therm is grounded, AC_ok is grounded, LID is grounded, Onkey = High and Reset = High (High = 2.5V) There is no respond and occurring communication at all. Would you please help us to solve this issue if you managed this issue?
I hope that hearing from you soon on.
Thanks,
TD