I’m trying to get run 6 Raspberry Pi cameras of a J20 Auvidea board on my Jeston TX2 (28.1).
I’ve followed https://devtalk.nvidia.com/default/topic/1009359/jetson-tx2/jetson-tx1-sensor-driver-porting-to-tx2-4-4-kernel-/1 and
https://devtalk.nvidia.com/default/topic/1010558/jetson-tx2/v4l2-drivers-for-tegra-x2-v4l2-and-nvcamerasrc/1 and the sensor driver programming guide for reference.
The issue I have is my sensor driver probe function isn’t being called.
Here is what I have done so far:
I modified
hardware/nvidia/platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-base.dts
As suggested I commented out “tegra186-quill-camera-modules.dtsi” & “tegra186-quill-camera-plugin-manager.dtsi”.
I’ve noticed that “tegra186-camera-e3322-a00.dtsi” uses IMX-219 sensor driver.
I’ve modified the /hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-modules/tegra186-camera-e3322-a00.dtsi to the following:
/*
* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* camera control gpio definitions */
/ {
host1x {
vi@15700000 {
num-channels = <6>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "okay";
reg = <0>;
e3322_vi_in0: endpoint {
status = "okay";
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_out0>;
};
};
port@1 {
status = "okay";
reg = <1>;
e3322_vi_in1: endpoint {
status = "okay";
csi-port = <1>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_out1>;
};
};
port@2 {
status = "okay";
reg = <2>;
e3322_vi_in2: endpoint {
status = "okay";
csi-port = <2>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_out2>;
};
};
port@3 {
status = "okay";
reg = <3>;
e3322_vi_in3: endpoint {
status = "okay";
csi-port = <3>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_out3>;
};
};
port@4 {
status = "okay";
reg = <4>;
e3322_vi_in4: endpoint {
status = "okay";
csi-port = <4>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_out4>;
};
};
port@5 {
status = "okay";
reg = <5>;
e3322_vi_in5: endpoint {
status = "okay";
csi-port = <5>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_out5>;
};
};
};
};
nvcsi@150c0000 {
status = "okay";
num-channels = <6>;
channel@0 {
reg = <0>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "okay";
reg = <0>;
e3322_csi_in0: endpoint@0 {
status = "okay";
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&e3322_imx219_out0>;
};
};
port@1 {
status = "okay";
reg = <1>;
e3322_csi_out0: endpoint@1 {
status = "okay";
remote-endpoint = <&e3322_vi_in0>;
};
};
};
};
channel@1 {
reg = <1>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "okay";
reg = <0>;
e3322_csi_in1: endpoint@2 {
status = "okay";
csi-port = <1>;
bus-width = <2>;
remote-endpoint = <&e3322_imx219_out1>;
};
};
port@1 {
status = "okay";
reg = <1>;
e3322_csi_out1: endpoint@3 {
status = "okay";
remote-endpoint = <&e3322_vi_in1>;
};
};
};
};
channel@2 {
reg = <2>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "okay";
reg = <0>;
e3322_csi_in2: endpoint@4 {
status = "okay";
csi-port = <2>;
bus-width = <2>;
remote-endpoint = <&e3322_imx219_out2>;
};
};
port@1 {
status = "okay";
reg = <1>;
e3322_csi_out2: endpoint@5 {
status = "okay";
remote-endpoint = <&e3322_vi_in2>;
};
};
};
};
channel@3 {
reg = <3>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "okay";
reg = <0>;
e3322_csi_in3: endpoint@6 {
status = "okay";
csi-port = <3>;
bus-width = <2>;
remote-endpoint = <&e3322_imx219_out3>;
};
};
port@1 {
status = "okay";
reg = <1>;
e3322_csi_out3: endpoint@7 {
status = "okay";
remote-endpoint = <&e3322_vi_in3>;
};
};
};
};
channel@4 {
reg = <4>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "okay";
reg = <0>;
e3322_csi_in4: endpoint@8 {
status = "okay";
csi-port = <4>;
bus-width = <2>;
remote-endpoint = <&e3322_imx219_out4>;
};
};
port@1 {
status = "okay";
reg = <1>;
e3322_csi_out4: endpoint@9 {
status = "okay";
remote-endpoint = <&e3322_vi_in4>;
};
};
};
};
channel@5 {
reg = <5>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
status = "okay";
reg = <0>;
e3322_csi_in5: endpoint@10 {
status = "okay";
csi-port = <5>;
bus-width = <2>;
remote-endpoint = <&e3322_imx219_out5>;
};
};
port@1 {
status = "okay";
reg = <1>;
e3322_csi_out5: endpoint@11 {
status = "okay";
remote-endpoint = <&e3322_vi_in5>;
};
};
};
};
};
};
i2c@3180000 {
status = "okay";
tca9548@77 {
i2c@0 {
imx219_a@10 {
devnode = "video0";
compatible = "nvidia,imx219";
reg = <0x10>;
physical_w = "5.095";
physical_h = "4.930";
sensor_model ="imx219";
dovdd-supply = <&en_vdd_cam>;
avdd-reg = "vana";
dvdd-reg = "vdig";
iovdd-reg = "dovdd";
mode0 { // IMX219_MODE_3280X2464
mclk_khz = "24000";
num_lanes = "2";
tegra_sinterface = "serial_a";
discontinuous_clk = "yes";
cil_settletime = "0";
active_w = "3280";
active_h = "2464";
pixel_t = "bayer_rggb";
readout_orientation = "90";
line_length = "3448";
inherent_gain = "1";
mclk_multiplier = "25";
pix_clk_hz = "224000000";
min_gain_val = "1.0";
max_gain_val = "16.0";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
min_framerate = "1.462526";
max_framerate = "21";
min_exp_time = "13";
max_exp_time = "683709";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3322_imx219_out0: endpoint {
csi-port = <0>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_in0>;
};
};
};
};
};
i2c@1 {
imx219_b@10 {
devnode = "video1";
compatible = "nvidia,imx219";
reg = <0x10>;
physical_w = "5.095";
physical_h = "4.930";
sensor_model ="imx219";
avdd-reg = "vana";
dvdd-reg = "vdig";
iovdd-reg = "dovdd";
mode0 { // IMX219_MODE_3280X2464
mclk_khz = "24000";
num_lanes = "2";
tegra_sinterface = "serial_b";
discontinuous_clk = "yes";
cil_settletime = "0";
active_w = "3280";
active_h = "2464";
pixel_t = "bayer_rggb";
readout_orientation = "90";
line_length = "3448";
inherent_gain = "1";
mclk_multiplier = "25";
pix_clk_hz = "224000000";
min_gain_val = "1.0";
max_gain_val = "16.0";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
min_framerate = "1.462526";
max_framerate = "21";
min_exp_time = "13";
max_exp_time = "683709";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3322_imx219_out1: endpoint {
csi-port = <1>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_in1>;
};
};
};
};
};
i2c@2 {
imx219_c@10 {
devnode = "video2";
compatible = "nvidia,imx219";
reg = <0x10>;
physical_w = "5.095";
physical_h = "4.930";
sensor_model ="imx219";
avdd-reg = "vana";
dvdd-reg = "vdig";
iovdd-reg = "dovdd";
mode0 { // IMX219_MODE_3280X2464
mclk_khz = "24000";
num_lanes = "2";
tegra_sinterface = "serial_c";
discontinuous_clk = "yes";
cil_settletime = "0";
active_w = "3280";
active_h = "2464";
pixel_t = "bayer_rggb";
readout_orientation = "90";
line_length = "3448";
inherent_gain = "1";
mclk_multiplier = "25";
pix_clk_hz = "224000000";
min_gain_val = "1.0";
max_gain_val = "16.0";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
min_framerate = "1.462526";
max_framerate = "21";
min_exp_time = "13";
max_exp_time = "683709";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3322_imx219_out2: endpoint {
csi-port = <2>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_in2>;
};
};
};
};
};
i2c@3 {
imx219_d@10 {
devnode = "video3";
compatible = "nvidia,imx219";
reg = <0x10>;
physical_w = "5.095";
physical_h = "4.930";
sensor_model ="imx219";
avdd-reg = "vana";
dvdd-reg = "vdig";
iovdd-reg = "dovdd";
mode0 { // IMX219_MODE_3280X2464
mclk_khz = "24000";
num_lanes = "2";
tegra_sinterface = "serial_d";
discontinuous_clk = "yes";
cil_settletime = "0";
active_w = "3280";
active_h = "2464";
pixel_t = "bayer_rggb";
readout_orientation = "90";
line_length = "3448";
inherent_gain = "1";
mclk_multiplier = "25";
pix_clk_hz = "224000000";
min_gain_val = "1.0";
max_gain_val = "16.0";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
min_framerate = "1.462526";
max_framerate = "21";
min_exp_time = "13";
max_exp_time = "683709";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3322_imx219_out3: endpoint {
csi-port = <3>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_in3>;
};
};
};
};
};
i2c@4 {
imx219_e@10 {
devnode = "video4";
compatible = "nvidia,imx219";
reg = <0x10>;
physical_w = "5.095";
physical_h = "4.930";
sensor_model ="imx219";
avdd-reg = "vana";
dvdd-reg = "vdig";
iovdd-reg = "dovdd";
mode0 { // IMX219_MODE_3280X2464
mclk_khz = "24000";
num_lanes = "2";
tegra_sinterface = "serial_e";
discontinuous_clk = "yes";
cil_settletime = "0";
active_w = "3280";
active_h = "2464";
pixel_t = "bayer_rggb";
readout_orientation = "90";
line_length = "3448";
inherent_gain = "1";
mclk_multiplier = "25";
pix_clk_hz = "224000000";
min_gain_val = "1.0";
max_gain_val = "16.0";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
min_framerate = "1.462526";
max_framerate = "21";
min_exp_time = "13";
max_exp_time = "683709";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3322_imx219_out4: endpoint {
csi-port = <4>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_in4>;
};
};
};
};
};
i2c@5 {
imx219_f@10 {
devnode = "video5";
compatible = "nvidia,imx219";
reg = <0x10>;
physical_w = "5.095";
physical_h = "4.930";
sensor_model ="imx219";
avdd-reg = "vana";
dvdd-reg = "vdig";
iovdd-reg = "dovdd";
mode0 { // IMX219_MODE_3280X2464
mclk_khz = "24000";
num_lanes = "2";
tegra_sinterface = "serial_f";
discontinuous_clk = "yes";
cil_settletime = "0";
active_w = "3280";
active_h = "2464";
pixel_t = "bayer_rggb";
readout_orientation = "90";
line_length = "3448";
inherent_gain = "1";
mclk_multiplier = "25";
pix_clk_hz = "224000000";
min_gain_val = "1.0";
max_gain_val = "16.0";
min_hdr_ratio = "1";
max_hdr_ratio = "64";
min_framerate = "1.462526";
max_framerate = "21";
min_exp_time = "13";
max_exp_time = "683709";
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
e3322_imx219_out5: endpoint {
csi-port = <5>;
bus-width = <2>;
remote-endpoint = <&e3322_csi_in5>;
};
};
};
};
};
};
};
};
/* camera control gpio definitions */
/ {
tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
/**
* Physical settings to calculate max ISO BW
*
* num_csi_lanes = <>;
* Total number of CSI lanes when all cameras are active
*
* max_lane_speed = <>;
* Max lane speed in Kbit/s
*
* min_bits_per_pixel = <>;
* Min bits per pixel
*
* vi_peak_byte_per_pixel = <>;
* Max byte per pixel for the VI ISO case
*
* vi_bw_margin_pct = <>;
* Vi bandwidth margin in percentage
*
* max_pixel_rate = <>;
* Max pixel rate in Kpixel/s for the ISP ISO case
*
* isp_peak_byte_per_pixel = <>;
* Max byte per pixel for the ISP ISO case
*
* isp_bw_margin_pct = <>;
* Isp bandwidth margin in percentage
*/
num_csi_lanes = <12>;
max_lane_speed = <1500000>;
min_bits_per_pixel = <10>;
vi_peak_byte_per_pixel = <2>;
vi_bw_margin_pct = <25>;
isp_peak_byte_per_pixel = <5>;
isp_bw_margin_pct = <25>;
/**
* The general guideline for naming badge_info contains 3 parts, and is as follows,
* The first part is the camera_board_id for the module; if the module is in a FFD
* platform, then use the platform name for this part.
* The second part contains the position of the module, ex. “rear” or “front”.
* The third part contains the last 6 characters of a part number which is found
* in the module's specsheet from the vender.
*/
modules {
module0 {
status = "okay";
badge = "e3322_bottomleft_A815P2";
position = "bottomleft";
orientation = "1";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 30-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@0/imx219_a@10";
};
};
module1 {
status = "okay";
badge = "e3322_centerleft_A815P2";
position = "centerleft";
orientation = "1";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 31-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@1/imx219_b@10";
};
};
module2 {
status = "okay";
badge = "e3322_centerright_A815P2";
position = "centerright";
orientation = "1";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 32-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@2/imx219_c@10";
};
};
module3 {
status = "okay";
badge = "e3322_topleft_A815P2";
position = "topleft";
orientation = "1";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 33-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@3/imx219_d@10";
};
};
module4 {
status = "okay";
badge = "e3322_bottomright_A815P2";
position = "bottomright";
orientation = "1";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 34-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@4/imx219_e@10";
};
};
module5 {
status = "okay";
badge = "e3322_topright_A815P2";
position = "topright";
orientation = "1";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 35-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@5/imx219_f@10";
};
};
};
};
};
Here is my /hardware/nvidia/platform/t18x/common/kernel-dts/t18x-common-platforms/tegra186-quill-camera-e3322-a00.dtsi
/*
* Copyright (c) 2015-2016, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <t18x-common-modules/tegra186-camera-e3322-a00.dtsi>
#include "dt-bindings/clock/tegra186-clock.h"
#define CAM0_RST_L TEGRA_MAIN_GPIO(R, 5)
#define CAMERA_I2C_MUX_BUS(x) (0x1E + x)
/* camera control gpio definitions */
/ {
gpio@2200000 {
camera-control-output-high {
gpio-hog;
output-high;
gpios = <CAM0_RST_L 0>;
label = "cam0-rst";
};
camera-control-output-low {
status = "okay";
};
camera-control-input {
status = "okay";
};
};
i2c@3180000 {
tca6408_21: tca6408@21 {
compatible = "ti,tca6408";
gpio-controller;
#gpio-cells = <2>;
reg = <0x21>;
vcc-supply = <&en_vdd_cam>;
tca6408_21_input {
/*
* GPIO-6 : NC
* GPIO-7 : NC
*/
gpio-hog;
input;
gpios = <6 0 7 0>;
label = "tca6408_21_input_6",
"tca6408_21_input_7";
};
tca6408_21_outlow {
/*
* GPIO-0 : XCLR_CAM1
* GPIO-1 : XCLR_CAM2
* GPIO-2 : XCLR_CAM3
* GPIO-3 : XCLR_CAM4
* GPIO-4 : XCLR_CAM5
* GPIO-5 : XCLR_CAM6
*/
gpio-hog;
output-low;
gpios = <0 0 1 0 2 0 3 0 4 0 5 0>;
label = "tca6408_21_outlow_0",
"tca6408_21_outlow_1",
"tca6408_21_outlow_2",
"tca6408_21_outlow_3",
"tca6408_21_outlow_4",
"tca6408_21_outlow_5";
};
tca6408_21_outhigh {
status = "okay";
};
};
tca9548_77: tca9548@77 {
compatible = "nxp,pca9548";
reg = <0x77>;
#address-cells = <1>;
#size-cells = <0>;
vcc-supply = <&en_vdd_cam>;
skip_mux_detect;
force_bus_start = <CAMERA_I2C_MUX_BUS(0)>;
i2c@0 {
reg = <0>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@1 {
reg = <1>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@2 {
reg = <2>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@3 {
reg = <3>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@4 {
reg = <4>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
};
i2c@5 {
reg = <5>;
i2c-mux,deselect-on-exit;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
};
/* camera control gpio definitions */
/ {
i2c@3180000 {
tca9548@77 {
i2c@0 {
imx219_a@10 {
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>;
clock-names = "extperiph1";
mclk = "extperiph1";
reset-gpios = <&tca6408_21 0 GPIO_ACTIVE_HIGH>;
vana-supply = <&en_vdd_cam_hv_2v8>;
vdig-supply = <&en_vdd_sys>;
dovdd-supply = <&en_vdd_cam>;
};
};
i2c@1 {
imx219_b@10 {
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>;
clock-names = "extperiph1";
mclk = "extperiph1";
reset-gpios = <&tca6408_21 1 GPIO_ACTIVE_HIGH>;
vana-supply = <&en_vdd_cam_hv_2v8>;
vdig-supply = <&en_vdd_sys>;
dovdd-supply = <&en_vdd_cam>;
};
};
i2c@2 {
imx219_c@10 {
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH1>;
clock-names = "extperiph1";
mclk = "extperiph1";
reset-gpios = <&tca6408_21 2 GPIO_ACTIVE_HIGH>;
vana-supply = <&en_vdd_cam_hv_2v8>;
vdig-supply = <&en_vdd_sys>;
dovdd-supply = <&en_vdd_cam>;
};
};
i2c@3 {
imx219_d@10 {
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH2>;
clock-names = "extperiph2";
mclk = "extperiph2";
reset-gpios = <&tca6408_21 3 GPIO_ACTIVE_HIGH>;
vana-supply = <&en_vdd_cam_hv_2v8>;
vdig-supply = <&en_vdd_sys>;
dovdd-supply = <&en_vdd_cam>;
};
};
i2c@4 {
imx219_e@10 {
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH2>;
clock-names = "extperiph2";
mclk = "extperiph2";
reset-gpios = <&tca6408_21 4 GPIO_ACTIVE_HIGH>;
vana-supply = <&en_vdd_cam_hv_2v8>;
vdig-supply = <&en_vdd_sys>;
dovdd-supply = <&en_vdd_cam>;
};
};
i2c@5 {
imx219_f@10 {
clocks = <&tegra_car TEGRA186_CLK_EXTPERIPH2>;
clock-names = "extperiph2";
mclk = "extperiph2";
reset-gpios = <&tca6408_21 5 GPIO_ACTIVE_HIGH>;
vana-supply = <&en_vdd_cam_hv_2v8>;
vdig-supply = <&en_vdd_sys>;
dovdd-supply = <&en_vdd_cam>;
};
};
};
};
};
Here is my /hardware/nvidia/platform/t18x/quill/kernel-dts/tegra186-quill-p3310-1000-a00-00-base.dts
/*
* tegra186-quill-p3310-a00-00-base.dts Quill A00 Board
*
* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*/
#include <t18x-common-platforms/tegra186-quill-common-p3310-1000-a00.dtsi>
#include <t18x-common-platforms/tegra186-quill-power-tree-p3310-1000-a00-00.dtsi>
//#include <t18x-common-platforms/tegra186-quill-camera-modules.dtsi>
#include <t18x-common-platforms/tegra186-quill-camera-e3322-a00.dtsi>
#include <t18x-common-modules/tegra186-display-e3320-1000-a00.dtsi>
/* comms dtsi file should be included after gpio dtsi file */
#include <t18x-common-platforms/tegra186-quill-comms.dtsi>
#include <t18x-common-plugin-manager/tegra186-quill-p3310-1000-a00-plugin-manager.dtsi>
#include <t18x-common-modules/tegra186-super-module-e2614-p2597-1000-a00.dtsi>
#include <t18x-common-plugin-manager/tegra186-quill-display-plugin-manager.dtsi>
#include <t18x-common-prod/tegra186-priv-quill-p3310-1000-a00-prod.dtsi>
//#include <t18x-common-plugin-manager/tegra186-quill-camera-plugin-manager.dtsi>
#include <dt-bindings/linux/driver-info.h>
/ {
model = "quill";
compatible = "nvidia,quill", "nvidia,tegra186";
nvidia,dtsfilename = __FILE__;
nvidia,boardids = "3310:0000:A0";
nvidia,proc-boardid = "3310:0000:A0";
chosen {
board-has-eeprom;
bootargs ="console=ttyS0,115200";
stdout-path = &uarta;
};
firmware {
android {
compatible = "android,firmware";
hardware = "quill";
};
};
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x70000000>;
};
usb_cd {
status = "okay";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
phy-names = "otg-phy";
};
xotg {
status = "okay";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
phy-names = "otg-usb2";
};
xudc@3550000 {
status = "okay";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>;
phy-names = "usb2";
emc-frequency = <150000000>;
};
xhci@3530000 {
status = "okay";
phys = <&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(0)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_UTMI_P(1)>,
<&tegra_xusb_padctl TEGRA_PADCTL_PHY_USB3_P(1)>;
phy-names = "utmi-0", "utmi-1", "usb3-1";
nvidia,boost_cpu_freq = <800>;
};
pinctrl@3520000 {
status = "okay";
pinctrl-0 = <&tegra_xusb_padctl_pinmux_default>;
pinctrl-1 = <&vbus_en0_sfio_tristate_state>;
pinctrl-2 = <&vbus_en1_sfio_tristate_state>;
pinctrl-3 = <&vbus_en0_sfio_passthrough_state>;
pinctrl-4 = <&vbus_en1_sfio_passthrough_state>;
pinctrl-5 = <&vbus_en0_default_state>;
pinctrl-6 = <&vbus_en1_default_state>;
pinctrl-names = "default",
"vbus_en0_sfio_tristate", "vbus_en1_sfio_tristate",
"vbus_en0_sfio_passthrough", "vbus_en1_sfio_passthrough",
"vbus_en0_default", "vbus_en1_default";
tegra_xusb_padctl_pinmux_default: pinmux {
/* Quill does not support usb3-micro AB */
usb2-micro-AB {
nvidia,lanes = "otg-0";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_OTG_CAP>;
nvidia,oc-pin = <0>;
};
usb2-std-A-port2 {
nvidia,lanes = "otg-1";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
usb3-std-A-port2 {
nvidia,lanes = "usb3-1";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
nvidia,oc-pin = <1>;
};
e3325-usb3-std-A-HS {
nvidia,lanes = "otg-2";
nvidia,function = "xusb";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "disabled";
};
e3325-usb3-std-A-SS {
nvidia,lanes = "usb3-0";
nvidia,port-cap = <TEGRA_PADCTL_PORT_HOST_ONLY>;
status = "disabled";
};
};
};
pcie-controller@10003000 {
status = "okay";
pci@1,0 {
nvidia,num-lanes = <2>;
status = "okay";
};
pci@2,0 {
nvidia,num-lanes = <1>;
status = "disabled";
};
pci@3,0 {
nvidia,num-lanes = <1>;
status = "okay";
};
};
i2c@3160000 {
lp8557-backlight-s-wuxga-8-0@2c {
status = "disabled";
};
};
i2c@c240000 {
clock-frequency = <400000>;
};
cpus {
status = "disabled";
};
host1x {
sor {
status = "disabled";
dp-display {
status = "disabled";
};
hdmi-display {
status = "disabled";
};
panel-s-edp-uhdtv-15-6 {
smartdimmer {
status = "disabled";
};
};
};
dpaux@155c0000 {
status = "disabled";
};
sor1 {
status = "okay";
hdmi-display {
status = "okay";
};
dp-display {
status = "disabled";
};
};
nvdisplay@15200000 {
status = "disabled";
};
nvdisplay@15220000 {
status = "disabled";
};
};
mttcan@c310000 {
status = "okay";
gpio_can_stb = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
gpio_can_en = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 1) GPIO_ACTIVE_HIGH>;
mram-params = <0 16 16 8 8 8 16 16 16>;
tx-config = <8 8 0 64>;
rx-config = <64 64 64>;
};
mttcan@c320000 {
status = "okay";
gpio_can_stb = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 6) GPIO_ACTIVE_HIGH>;
gpio_can_en = <&tegra_aon_gpio TEGRA_AON_GPIO(AA, 7) GPIO_ACTIVE_HIGH>;
mram-params = <0 16 16 8 8 8 16 16 16>;
tx-config = <8 8 0 64>;
rx-config = <64 64 64>;
};
};
#ifdef KERNEL_VERSION_4_9
#include "quill-platforms/tegra186-quill-kernel-4.9.dtsi"
#endif
Here is the “tegra-camera-platform” entry in my tegra186-quill-p3310-1000-c03-00-base.dtb
tegra-camera-platform {
compatible = "nvidia, tegra-camera-platform";
num_csi_lanes = <0x4>;
max_lane_speed = <0x16e360>;
min_bits_per_pixel = <0xa>;
vi_peak_byte_per_pixel = <0x2>;
vi_bw_margin_pct = <0x19>;
max_pixel_rate = <0xb71b0>;
isp_peak_byte_per_pixel = <0x5>;
isp_bw_margin_pct = <0x19>;
tpg_max_iso = <0x3bc400>;
linux,phandle = <0x134>;
phandle = <0x134>;
modules {
module0 {
badge = "imx274_bottom_A6V26";
position = "rear";
orientation = [31 00];
status = "disabled";
linux,phandle = <0x12c>;
phandle = <0x12c>;
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx274 30-001a";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9546@70/i2c@0/imx274_a@1a";
status = "disabled";
linux,phandle = <0x12d>;
phandle = <0x12d>;
};
drivernode1 {
pcl_id = "v4l2_lens";
proc-device-tree = "/proc/device-tree/lens_imx274@A6V26/";
devname = "lc898212 2-0072";
status = "disabled";
linux,phandle = <0x12e>;
phandle = <0x12e>;
};
};
module1 {
badge = "e3322_centerleft_A815P2";
position = "centerleft";
orientation = [31 00];
status = "okay";
linux,phandle = <0x137>;
phandle = <0x137>;
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 31-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@1/imx219_b@10";
status = "okay";
linux,phandle = <0x138>;
phandle = <0x138>;
};
};
module2 {
badge = "e3322_centerright_A815P2";
position = "centerright";
orientation = [31 00];
status = "okay";
linux,phandle = <0x14c>;
phandle = <0x14c>;
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 32-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@2/imx219_c@10";
status = "okay";
linux,phandle = <0x14d>;
phandle = <0x14d>;
};
};
module3 {
badge = "e3322_topleft_A815P2";
position = "topleft";
orientation = [31 00];
status = "okay";
linux,phandle = <0x154>;
phandle = <0x154>;
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 33-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@3/imx219_d@10";
status = "okay";
linux,phandle = <0x155>;
phandle = <0x155>;
};
};
module4 {
badge = "e3322_bottomright_A815P2";
position = "bottomright";
orientation = [31 00];
status = "okay";
linux,phandle = <0x15c>;
phandle = <0x15c>;
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 34-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@4/imx219_e@10";
status = "okay";
linux,phandle = <0x15d>;
phandle = <0x15d>;
};
};
module5 {
badge = "e3322_topright_A815P2";
position = "topright";
orientation = [31 00];
status = "okay";
linux,phandle = <0x165>;
phandle = <0x165>;
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 35-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@5/imx219_f@10";
status = "okay";
linux,phandle = <0x166>;
phandle = <0x166>;
};
};
module6 {
badge = "e3322_bottomleft_A815P2";
position = "bottomleft";
orientation = [31 00];
status = "okay";
drivernode0 {
pcl_id = "v4l2_sensor";
devname = "imx219 30-0036";
proc-device-tree = "/proc/device-tree/i2c@3180000/tca9548@77/i2c@0/imx219_a@10";
status = "okay";
};
};
};
};
I’ve also made sure to set “status = okay” in i2c@3180000 and tca9548@77 sections in the “tegra186-quill-p3310-1000-a00-00-base.dtb” and “tegra186-quill-p3310-1000-c03-00-base.dtb”
This is what I get in the boot log:
ubuntu@tegra-ubuntu:~$ dmesg | grep 157000
[ 0.251183] iommu: Adding device 15700000.vi to group 34
[ 4.857380] tegra-vi4 15700000.vi: initialized
[ 4.858652] tegra-vi4 15700000.vi: all channel register failed
ubuntu@tegra-ubuntu:~$
ubuntu@tegra-ubuntu:~$ dmesg | grep 3180000
[ 0.234729] iommu: Adding device 3180000.i2c to group 5
[ 4.756393] tegra-i2c 3180000.i2c: no acknowledge from address 0x21
Is there anything else that has to be done?
Thanks.