IMX296 driver for Jetson Orin Nano Super 8G Devkit as loadable module (insmod)

ashish.bansal · January 16, 2026, 3:48pm

hello jerry.chang,

I was going through the nv_imx185.c and its dtsi and noticed following.

No regulators mentioned anywhere – so i removed regulators from both dtb and driver.
In imx185_setup_board func, camera_common_mclk_enable function is called. When i did same in my driver, i get following error during probing

[   87.039655] imx296 9-001a: camera_common_mclk_enable: no device power rail
[   87.039678] imx296 9-001a: Error -19 turning on mclk

is this expected
3. Clock in the dtb was also wrong, corrected it as per imx185 clock properties

I have made many more changes taking nv_imx185.c as reference.

JerryChang · January 19, 2026, 3:12am

hello ashish.bansal,

mclk is the name of the input clock for the device. the default value is extperiph1.
you should have input clock, otherwise, please use an external clock source.

you should have below entries within device tree.
clocks = <&bpmp_clks TEGRA234_CLK_EXTPERIPH1>, <&bpmp_clks TEGRA234_CLK_PLLP_OUT0>;
clock-names = "mclk", "parent";

then, you can use these entries via kernel APIs
struct clk* mclk = devm_clk_get(dev, "mclk");
struct clk* pclk = devm_clk_get(dev, "parent");
clk_prepare(mclk);
clk_set_parent(mclk, pclk);
clk_set_rate(mclk, 37125000);
clk_enable(mclk);

ashish.bansal · January 19, 2026, 7:36am

hello jerry.chang,

I have done the clock changes in dtb and drivers as suggested.
I figured out where it is hanging,

[  323.678874] tegra-camrtc-capture-vi tegra-capture-vi: subdev imx296 9-001a bound
[  323.679594] driver not enabled, cannot register any devices
[  323.679897] imx296 9-001a: >> TRACE [imx296_probe]: after subdev register
[  332.890624] imx296 9-001a: >> TRACE [imx296_identify_model]: getting some match first
[  333.402901] imx296 9-001a: >> TRACE [imx296_identify_model]: Releasing standby mode

[  333.915070] imx296 9-001a: >> TRACE [imx296_identify_model]: Waiting 50ms for sensor to wake up.. .

[  334.426884] imx296 9-001a: after condition  check
[  334.938574] imx296 9-001a: Reading sensor info register
[  334.939760] imx296 9-001a: Raw sensor info: 0x4a00
[  334.940302] imx296 9-001a: Found IMX296LQ (temp: 26.8°C)
[  334.940460] >> TRACE [imx296_probe]: tc_dev->v4l2sd_ops is NULL

if you see the last line of dmesg, we can see the tc_dev->v4l2sd_ops is NULL.
And in the 2nd line of above log, there is following message
[ 323.679594] driver not enabled, cannot register any devices
it probably means it is not enabling driver for v4l2, even though it is creating the /dev/video0, /dev/media0 /dev/subdev-1 and 2

ashish@ubuntu:~/VNS/vns-app-layer/driver_2$ ls /dev/ | grep "video"
video0
ashish@ubuntu:~/VNS/vns-app-layer/driver_2$ ls /dev/ | grep "video0"
video0
ashish@ubuntu:~/VNS/vns-app-layer/driver_2$ ls /dev/ | grep "subdev"
v4l-subdev0
v4l-subdev1
ashish@ubuntu:~/VNS/vns-app-layer/driver_2$ ls /dev/ | grep "media"
media0

I am under the impression that tc_dev->v4l2sd_ops is supposed to be handled by the tegracam driver.
Or should i manually set it or atleast do a kalloc?
below are the last line of probe function

	ret = tegracam_v4l2subdev_register(tc_dev, true);
	if (ret) {
		dev_err(&client->dev, "tegracam_v4l2subdev_register failed: %d\n", ret);
		return -1;
	}
	TRACE_PRINT(sensor->dev, "after subdev register");

	sensor->regmap = tc_dev->s_data->regmap;
	
    // imx296_power_off(tc_dev->s_data);  // Off until streaming
	ret = imx296_identify_model(sensor);
	// tc_dev
	if(tc_dev->v4l2sd_ops == NULL)
	{
		TRACE_RAW_PRINT("tc_dev->v4l2sd_ops is NULL");
	}
	else if(tc_dev->v4l2sd_ops->video == NULL)
	{
		TRACE_RAW_PRINT("tc_dev->v4l2sd_ops->video is NULL");
	}
	else if((void*)tc_dev->v4l2sd_ops->video->s_stream == NULL){
		TRACE_RAW_PRINT("tc_dev->v4l2sd_ops->video->s_stream is NULL");
	}
	else {		
		TRACE_RAW_PRINT("%p %p", tc_dev->v4l2sd_ops->video->s_stream, imx296_init_state);
	}
	TRACE_PRINT(sensor->dev, "--------------after identify--------------");

JerryChang · January 19, 2026, 8:23am

hello ashish.bansal,

please see-also reference driver, you should have below operations for video node registration.

static int imx185_probe(...)
{
     ...
        tc_dev->sensor_ops = &imx185_common_ops;
        tc_dev->v4l2sd_internal_ops = &imx185_subdev_internal_ops;
        tc_dev->tcctrl_ops = &imx185_ctrl_ops;

ashish.bansal · January 19, 2026, 8:30am

hello jerry.chang,

So now there is some success, after correct dtb.
Solved by following

Clock properties changes as suggest by you
The compatible string in fragment related to tegra-camera-platform was miss-spelled

the error regarding
driver not enabled, cannot register any devices
was corrected with above implementation

following is the current output

v4l2-ctl -d /dev/video0 --set-fmt-video=width=1456,height=1088,pixelformat=RG10 --stream-mmap --stream-count=1 --verbose
VIDIOC_QUERYCAP: ok
VIDIOC_G_FMT: ok
VIDIOC_S_FMT: ok
Format Video Capture:
	Width/Height      : 1440/1080
	Pixel Format      : 'RG10' (10-bit Bayer RGRG/GBGB)
	Field             : None
	Bytes per Line    : 2880
	Size Image        : 3110400
	Colorspace        : sRGB
	Transfer Function : Default (maps to sRGB)
	YCbCr/HSV Encoding: Default (maps to ITU-R 601)
	Quantization      : Default (maps to Full Range)
	Flags             : 
		VIDIOC_REQBUFS returned 0 (Success)
		VIDIOC_QUERYBUF returned 0 (Success)
		VIDIOC_QUERYBUF returned 0 (Success)
		VIDIOC_QUERYBUF returned 0 (Success)
		VIDIOC_QUERYBUF returned 0 (Success)
		VIDIOC_QBUF returned 0 (Success)
		VIDIOC_QBUF returned 0 (Success)
		VIDIOC_QBUF returned 0 (Success)
		VIDIOC_QBUF returned 0 (Success)
		VIDIOC_STREAMON returned 0 (Success)
cap dqbuf: 0 seq:      0 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 0 seq:      0 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 1 seq:      1 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 2 seq:      2 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 3 seq:      3 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 0 seq:      0 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 0 seq:      0 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 1 seq:      1 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 2 seq:      2 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
cap dqbuf: 3 seq:      3 bytesused: 3110400 ts: 0.000000 (error, ts-monotonic, ts-src-eof)
^C^C^C

And its corresponding dmesg log

[  613.107410] imx296 9-001a: >> TRACE [imx296_power_on]: Just
[  613.825597] imx296 9-001a: >> TRACE [imx296_power_on]: After delay 200ms
[  614.367825] imx296 9-001a: >> TRACE [imx296_set_mode]: sensor dev
[  614.401572] [RCE] ERROR: camera-ip/nvcsi/nvcsi.c:2015 [nvcsi_stream_set_config] "MIPI clock rate not known. Using 750000 kHz
[  614.401583] [RCE] "
[  614.919406] imx296 9-001a: init reg write failed idx=19 addr=0x3541 ret=-5
[  614.920427] imx296 9-001a: init reg write failed idx=20 addr=0x3516 ret=-5
[  614.921438] imx296 9-001a: init reg write failed idx=21 addr=0x350b ret=-5
[  614.922467] imx296 9-001a: init reg write failed idx=22 addr=0x3758 ret=-5
[  614.923496] imx296 9-001a: init reg write failed idx=23 addr=0x3759 ret=-5
[  614.924520] imx296 9-001a: init reg write failed idx=24 addr=0x375a ret=-5
[  614.925585] imx296 9-001a: init reg write failed idx=25 addr=0x375b ret=-5
[  614.926615] imx296 9-001a: init reg write failed idx=26 addr=0x3832 ret=-5
[  614.927640] imx296 9-001a: init reg write failed idx=27 addr=0x3833 ret=-5
[  614.928656] imx296 9-001a: init reg write failed idx=28 addr=0x38a2 ret=-5
[  614.929544] imx296 9-001a: init reg write failed idx=29 addr=0x38a3 ret=-5
[  614.930555] imx296 9-001a: init reg write failed idx=30 addr=0x3a00 ret=-5
[  614.931772] imx296 9-001a: init reg write failed idx=31 addr=0x3d48 ret=-5
[  614.932804] imx296 9-001a: init reg write failed idx=32 addr=0x3d49 ret=-5
[  614.934022] imx296 9-001a: init reg write failed idx=33 addr=0x3d4a ret=-5
[  614.934631] imx296 9-001a: init reg write failed idx=34 addr=0x3d4b ret=-5
[  614.935209] imx296 9-001a: init reg write failed idx=35 addr=0x400e ret=-5
[  614.935774] imx296 9-001a: init reg write failed idx=36 addr=0x4014 ret=-5
[  614.936382] imx296 9-001a: init reg write failed idx=37 addr=0x4041 ret=-5
[  614.936908] imx296 9-001a: init reg write failed idx=38 addr=0x40a2 ret=-5
[  614.937662] imx296 9-001a: init reg write failed idx=39 addr=0x40c1 ret=-5
[  614.938698] imx296 9-001a: init reg write failed idx=40 addr=0x40c7 ret=-5
[  614.939727] imx296 9-001a: init reg write failed idx=41 addr=0x40c8 ret=-5
[  614.940752] imx296 9-001a: init reg write failed idx=42 addr=0x4174 ret=-5
[  614.947524] >> TRACE [imx296_start_streaming]: Releasing standby to start streaming 13000

[  615.473966] >> TRACE [imx296_start_streaming]: Return val - 0

[  616.913507] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[  616.913534] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[  616.914594] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[  619.473500] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[  619.473525] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[  619.474625] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[  622.001396] tegra-camrtc-capture-vi tegra-capture-vi: uncorr_err: request timed out after 2500 ms
[  622.001420] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: attempting to reset the capture channel
[  622.002741] tegra-camrtc-capture-vi tegra-capture-vi: err_rec: successfully reset the capture channel
[  622.002775] imx296 9-001a: >> TRACE [imx296_stop_streaming]: Stopping streaming...
[  622.513971] >> TRACE [imx296_power_off]: in power off
[  623.025358] imx296 9-001a: >> TRACE [imx296_power_off]: Disabling regulators
[  623.537342] imx296 9-001a: >> TRACE [imx296_stop_streaming]: Streaming stopped
[  624.054999] >> TRACE [imx296_power_off]: in power off

set mode, stream start and stream stop function

static int imx296_set_mode(struct tegracam_device *tc_dev) {
	int i;
	struct imx296 *sensor = tegracam_get_privdata(tc_dev);
	TRACE_PRINT(sensor->dev, "sensor dev");

	for(i = 0 ; i < ARRAY_SIZE(imx296_init_regs); ++i)
	{
		int ret = regmap_write(sensor->regmap, imx296_init_regs[i].addr, imx296_init_regs[i].val);
		if (ret < 0)
			dev_err(sensor->dev, "init reg write failed idx=%d addr=0x%x ret=%d\n", i, imx296_init_regs[i].addr, ret);
		usleep_range(500, 1000); // Add a 0.5ms delay between register writes
	}

	/* Line and Frame Timing */
	regmap_write(sensor->regmap, IMX296_HMAX, IMX296_FIXED_HMAX & 0xFF);
	regmap_write(sensor->regmap, IMX296_HMAX + 1, (IMX296_FIXED_HMAX >> 8) & 0xFF);
	sensor->vmax = IMX296_HEIGHT + IMX296_DEFAULT_VBLANK;
	regmap_write(sensor->regmap, IMX296_VMAX, sensor->vmax & 0xFF);
	regmap_write(sensor->regmap, IMX296_VMAX + 1, (sensor->vmax >> 8) & 0xFF);
	regmap_write(sensor->regmap, IMX296_VMAX + 2, (sensor->vmax >> 16) & 0xFF);
	return 0;
}

static int imx296_start_streaming(struct tegracam_device *tc_dev)
{
	struct imx296 *sensor = tegracam_get_privdata(tc_dev);
	int ret ;
	TRACE_RAW_PRINT("Releasing standby to start streaming %04X\n", IMX296_CTRL00);
	ret = imx296_write(sensor, IMX296_CTRL00, 0x00, NULL);
	TRACE_RAW_PRINT("Return val - %d\n", ret);
    // Release standby (Bit 0 = 0 is 'Operating' for IMX296)
    return ret;
}

static int imx296_stop_streaming(struct tegracam_device *tc_dev) {
    struct imx296 *sensor = tegracam_get_privdata(tc_dev);
    int err = 0;

    TRACE_PRINT(sensor->dev, "Stopping streaming...");

    // Set standby
    err = imx296_write(sensor, IMX296_CTRL00, IMX296_CTRL00_STANDBY, NULL);
    if (err) {
        dev_err(sensor->dev, "Failed to set standby: %d\n", err);
        return err;
    }

    // Power off
    imx296_power_off(tc_dev->s_data);

    TRACE_PRINT(sensor->dev, "Streaming stopped");

    return 0;
}

EduardoSalazar96 · January 19, 2026, 7:19pm

Hello @ashish.bansal

Could you please share the VI/CSI trace? Check Enable VI/CSI trace on Jetson Orin Nano using Jetpack 6.2 in order to enable the trace.

Also, check the pixel_clk_hz device tree calculation:

Regards!

ashish.bansal · January 20, 2026, 4:42am

Hello @EduardoSalazar96,

Please find the output below

$ sudo cat /sys/kernel/debug/tracing/trace
# tracer: nop
#
# entries-in-buffer/entries-written: 0/0   #P:6
#
#                                _-------=> irqs-off
#                               / _------=> need-resched
#                              | / _-----=> need-resched-lazy
#                              || / _----=> hardirq/softirq
#                              ||| / _---=> preempt-depth
#                              |||| / _--=> preempt-lazy-depth
#                              ||||| / _-=> migrate-disable
#                              |||||| /     delay
#           TASK-PID     CPU#  |||||||  TIMESTAMP  FUNCTION
#              | |         |   |||||||      |         |
$ v4l2-ctl --list-formats-ext
ioctl: VIDIOC_ENUM_FMT
	Type: Video Capture

	[0]: 'RG10' (10-bit Bayer RGRG/GBGB)

Also, followed the same tutorial and used the value accordingly.

/* Mode 0 */
						mode0 {
							mclk_khz = "37125";
							num_lanes = "1";
							tegra_sinterface = "serial_c";
							phy_mode = "DPHY";
							discontinuous_clk = "yes";
							dpcm_enable = "false";
							cil_settletime = "0";
							
							active_w = "1440";
							active_h = "1080";
							mode_type = "bayer";
							pixel_phase = "bggr";
							csi_pixel_bit_depth = "10";
							readout_orientation = "0";
							line_length = "1760";
							inherent_gain = "1";
							mclk_multiplier = "3.2";
							pix_clk_hz = "118800000";
							
							gain_factor = "16";
							framerate_factor = "1000000";
							exposure_factor = "1000000";
							min_gain_val = "0";
							max_gain_val = "480";
							step_gain_val = "1";
							default_gain = "0";
							min_hdr_ratio = "1";
							max_hdr_ratio = "1";
							min_framerate = "2000000";
							max_framerate = "60000000";
							step_framerate = "1";
							default_framerate = "60000000";
							min_exp_time = "13";
							max_exp_time = "683709";
							step_exp_time = "1";
							default_exp_time = "33333";
							embedded_metadata_height = "2";
						};

EduardoSalazar96 · January 20, 2026, 7:42pm

@ashish.bansal

To enable the VI/CSI trace run:

sudo su
modprobe rtcpu_debug

echo 1 > /sys/kernel/debug/tracing/tracing_on
echo 30720 > /sys/kernel/debug/tracing/buffer_size_kb
echo 1 > /sys/kernel/debug/tracing/events/tegra_rtcpu/enable
echo 1 > /sys/kernel/debug/tracing/events/freertos/enable
echo 3 > /sys/kernel/debug/camrtc/log-level
echo 1 > /sys/kernel/debug/tracing/events/camera_common/enable
echo > /sys/kernel/debug/tracing/trace

exit

How did you compute this value?

Regards!

ashish.bansal · January 21, 2026, 4:13am

Hello @EduardoSalazar96

The link frequency :
link-frequencies = /bits/ 64 <1188000000>;
Also
num_lanes = "1"; // in mode0 node
bus-width = <1>; // in endpoints
csi_pixel_bit_depth = "10";
mclk_khz = "37125";

According to following relation

Sensor data rate = 1188000000 (per lane)
Number of lanes = 1
Bits per pixel = 10

therefore

pix_clk_hz = Sensor data rate * number of lanes / bits per pixel = 1188000000 * 1 / 10 = 118800000
pix_clk_hz = 118800000

and for the above pix_clk_hz

from above relation we get mclk_multiplier as 
mclk_multipler = pix_clk_hz / mclk_khz = 3.2

I have tried out the VI/CSI kernel trace as you suggested. Please have a look.
vi_csi-kernel_trace.txt (8.9 KB)

ashish.bansal · January 21, 2026, 9:06am

Hello @JerryChang and @EduardoSalazar96,

Below is my list of observations for where i am currently stuck

i2c write failing for PLL configurations of camera

static const struct reg_8 imx296_init_regs[] = {
    {0x3000, 0x00}, // Standby ON
    {0x300A, 0x3c}, // Minimal SHS1 (Exposure)
    {0x3005, 0xf0},
    {0x309e, 0x04},
    {0x30a0, 0x04},
    {0x30a1, 0x3c},
    {0x30a4, 0x5f},
    {0x30a8, 0x91},
    {0x30ac, 0x28},
    {0x30af, 0x09},
    {0x30df, 0x00},
    {0x3165, 0x00},
    {0x3169, 0x10},
    {0x316a, 0x02},
    {0x31c8, 0xf3}, /* Exposure-related */
    {0x31d0, 0xf4}, /* Exposure-related */
    {0x321a, 0x00},
    {0x3226, 0x02},
    {0x3256, 0x01},
    {0x3541, 0x72}, // after this register all the commands fails. They all fail.  
    {0x3516, 0x77},
    {0x350b, 0x7f},
    {0x3758, 0xa3},
    {0x3759, 0x00},
    {0x375a, 0x85},
    {0x375b, 0x00},
    {0x3832, 0xf5},
    {0x3833, 0x00},
    {0x38a2, 0xf6},
    {0x38a3, 0x00},
    {0x3a00, 0x80}, /* Critical for CSI-2 activation */
    {0x3d48, 0xa3},
    {0x3d49, 0x00},
    {0x3d4a, 0x85},
    {0x3d4b, 0x00},
    {0x400e, 0x58},
    {0x4014, 0x1c},
    {0x4041, 0x2a},
    {0x40a2, 0x06},
    {0x40c1, 0xf6},
    {0x40c7, 0x0f},
    {0x40c8, 0x00},
    {0x4174, 0x00},
};

a. Even if delay is introduced between the commands.
b. Even if i comment the commands above this are commented
c. Same commands are success from userspace using i2cset and i2ctransfer

While trying to stream using
v4l2-ctl --stream-mmap=3 --stream-count=10 -d /dev/video0 --stream-to=/dev/null
I get following message in dmesg

[ 143.315176] [RCE] ERROR: camera-ip/nvcsi/nvcsi.c:2015 [nvcsi_stream_set_config] "MIPI clock rate not known. Using 750000 kHz
[ 143.315188] [RCE] "

I have taken the vi/csi log trace if it helps
vi_csi-kernel_trace.txt (8.9 KB)

Below was suggested by the Grok AI to test. And i got this. The clock rate is very low here, 214.3MHz. Is this one of the issues too?

root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/refcount 
0
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate 
214300000
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate 
214300000
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/min_rate 
10045312
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/
dvfs              hz_off            mrq_rate_locked   rate              
dvfs_table        max_rate          parent            refcount          
flags             min_rate          possible_parents  state             
fmon/             mrqcount          pto_counter       vdd_core/         
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/parent 
pll_nvcsi
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/possible_parents 
pllp_out0 pll_nvcsi clk_m

JerryChang · January 22, 2026, 7:19am

hello ashish.bansal,

let’s check your latest device tree,
please follow the commands below to dump device tree into dts formats.
for instance,
$ sudo dtc -I fs -O dts /sys/firmware/devicetree/base > /tmp/123.dts

ashish.bansal · January 22, 2026, 7:39am

hello jerry.chang

I am sharing the dumped device tree with you. Please have a look at it.
I am currently looking into it.

current.dts.txt (315.5 KB)

JerryChang · January 22, 2026, 8:06am

hello ashish.bansal,

according to the disassembler results, it looks you did not update pix_clk_hz = 118800000 correctly.
for instance,

				imx296_c@1a {
					mode0 {
						pixel_phase = "bggr";
						mode_type = "bayer";
						pix_clk_hz = "20000000";

ashish.bansal · January 22, 2026, 8:13am

hello jerry.chang

Since there was a clock not error I was trying around to set the
link-frequencies = /bits/ 64 <214000000>; // 214 MHz

And updated the pix_clk_hz and other parameters accordingly.

I have a doubt, which clock should be passed to clocks and clocks-name, how does that work? Can you explain that? I don’t understand that part.
Also is the schematic of the Jetson Orin Nano Super Dev Kit publically available?

JerryChang · January 22, 2026, 8:31am

hello ashish.bansal,

pix_clk_hz is mandatory for camera use-case, it must be set correctly to avoid potential issues.
you may dig into below VI driver for paring device tree properties.
$public_sources/kernel_src/nvidia-oot/drivers/media/platform/tegra/camera/sensor_common.c

ashish.bansal · January 22, 2026, 8:36am

hello jerry.chang,

I will have a look at that. Thank you.

ashish.bansal · January 23, 2026, 6:29am

hello @JerryChang ,

I did have the look at sensor_common.c.

root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/refcount 
0
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate 
214300000
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/rate 
214300000
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/min_rate 
10045312
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/
dvfs              hz_off            mrq_rate_locked   rate              
dvfs_table        max_rate          parent            refcount          
flags             min_rate          possible_parents  state             
fmon/             mrqcount          pto_counter       vdd_core/         
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/parent 
pll_nvcsi
root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/possible_parents 
pllp_out0 pll_nvcsi clk_m

Also this error is not going away,

[ 143.315176] [RCE] ERROR: camera-ip/nvcsi/nvcsi.c:2015 [nvcsi_stream_set_config] "MIPI clock rate not known. Using 750000 kHz
[ 143.315188] [RCE] "

I double checked the link-frequencies and related parameters to match as per datasheet and formulas.
And used imx185 overlays as the reference.

I think i am missing some understanding regarding clock setting in dtb or sensor node.
I have few questions.

In the sensor node of camera

__overlay__ {
			cam_i2cmux {
				compatible = "i2c-mux-gpio";
				#address-cells = <1>;
				#size-cells = <0>;
				i2c-parent = <&cam_i2c>;
				mux-gpios = <&gpio_aon CAM_I2C_MUX GPIO_ACTIVE_HIGH>;

				i2c@1 {
					reg = <1>;
					#address-cells = <1>;
					#size-cells = <0>;

					imx296_c@1a {
						compatible = "sony,imx296";
						status = "okay";
						reg = <0x1a>;
						
						/* Sensor model properties */				
						physical_w = "3.680";
						physical_h = "2.760";
						sensor_model = "imx296";
						use_sensor_mode_id = "true";
						
						/* GPIOs */
						reset-gpios = <&gpio 160 0>;
						
						/* Clocks */
						clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>, <&bpmp TEGRA234_CLK_EXTPERIPH1>;
						clock-names = "mclk", "parent";

						assigned-clocks = <&bpmp TEGRA234_CLK_NVCSI>;
						assigned-clock-rates = <1000000000>;

what does defining the clock here means. Is it clock for i2c or nvcsi?
2. Please have a look below.

root@ubuntu:/home/ashish# cat /sys/kernel/debug/bpmp/debug/clk/nvcsi/max_rate 
214300000

Which is 214.3MHz. I don’t understand how is this value related to link-frequencies and to clock property mentioned above? If this is so low, can i use dtb to over-write its value to be 1Gbps? Or is this value set through make menuconfig?

JerryChang · January 23, 2026, 7:19am

hello ashish.bansal,

that’s input clock for the camera device.
as you can see, it’s using extperiph1, the maximum frequency is 37.09 MHz.

that’s clock rate of NVCSI.
the clock rate in the device tree is sensor pixel clock, pix_clk_hz.

ashish.bansal · January 23, 2026, 8:30am

hello @JerryChang ,

Sir, i am even more confused now.

Is the clock

						/* Clocks */
						clocks = <&bpmp TEGRA234_CLK_EXTPERIPH1>, <&bpmp TEGRA234_CLK_EXTPERIPH1>;
						clock-names = "mclk", "parent";

the nvcsi output clock or is it internal clock?

Does the nvcsi clock rate change based on pix_clk_hz? and if so i just need to find the correct value for pix_clk_hz and link-frequencies right?

JerryChang · January 23, 2026, 9:25am

you should only find the correct value for pix_clk_hz, VI driver side did not parse link-frequencies.

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